Revert riscv elements and unstable-riscv feature

svd-encoder/CHANGELOG.md

@@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## Unreleased
 
+- Revert the `riscv` element, as well as the `unstable-riscv` feature.
+
 ## [v0.14.5] - 2023-08-20
 
 - Adapt the `riscv` element to handle `riscv::Exception`.

svd-encoder/Cargo.toml

@@ -11,9 +11,6 @@ rust-version = "1.65.0"
 version = "0.14.5"
 readme = "README.md"
 
-[features]
-unstable-riscv = ["svd-rs/unstable-riscv"]
-
 [dependencies]
 convert_case = "0.6.0"
 svd-rs = { version = "0.14.9", path = "../svd-rs" }

svd-encoder/src/device.rs

@@ -34,12 +34,6 @@ impl Encode for Device {
             elem.children.push(new_node("licenseText", v.clone()));
         }
 
-        #[cfg(feature = "unstable-riscv")]
-        if let Some(v) = &self.riscv {
-            elem.children
-                .push(XMLNode::Element(v.encode_with_config(config)?));
-        }
-
         if let Some(v) = &self.cpu {
             elem.children
                 .push(XMLNode::Element(v.encode_with_config(config)?));

svd-encoder/src/lib.rs

@@ -103,7 +103,5 @@ mod readaction;
 mod register;
 mod registercluster;
 mod registerproperties;
-#[cfg(feature = "unstable-riscv")]
-mod riscv;
 mod usage;
 mod writeconstraint;

svd-parser/CHANGELOG.md

@@ -5,6 +5,10 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](http://keepachangelog.com/)
 and this project adheres to [Semantic Versioning](http://semver.org/).
 
+## Unreleased
+
+- Revert the `riscv` element, as well as the `unstable-riscv` feature.
+
 ## [v0.14.7] - 2024-10-03
 
 - Bump svd-rs to 0.14.9

svd-parser/Cargo.toml

@@ -17,7 +17,6 @@ readme = "README.md"
 [features]
 derive-from = ["svd-rs/derive-from"]
 expand = ["derive-from"]
-unstable-riscv = ["svd-rs/unstable-riscv"]
 
 [dependencies]
 svd-rs = { version = "0.14.9", path = "../svd-rs" }

svd-parser/src/device.rs

@@ -1,6 +1,4 @@
 use super::*;
-#[cfg(feature = "unstable-riscv")]
-use crate::svd::riscv::Riscv;
 use crate::svd::{cpu::Cpu, peripheral::Peripheral, registerproperties::RegisterProperties};
 
 /// Parses a SVD file
@@ -33,10 +31,6 @@ impl Parse for Device {
                     .collect();
                 ps?
             });
-        #[cfg(feature = "unstable-riscv")]
-        if let Some(riscv) = optional::<Riscv>("riscv", tree, config)? {
-            device = device.riscv(riscv);
-        }
         if let Some(version) = tree.get_child_text_opt("version")? {
             device = device.version(version)
         }

svd-parser/src/lib.rs

@@ -211,8 +211,6 @@ mod readaction;
 mod register;
 mod registercluster;
 mod registerproperties;
-#[cfg(feature = "unstable-riscv")]
-mod riscv;
 mod usage;
 mod writeconstraint;
 

svd-rs/CHANGELOG.md

@@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## Unreleased
 
+- Revert the `riscv` elements, as well as the `unstable-riscv` feature.
+
 ## [v0.14.9] - 2024-08-20
 
 - Add `riscv::Exception` for custom exception source enumerations.

svd-rs/Cargo.toml

@@ -15,7 +15,6 @@ readme = "README.md"
 
 [features]
 derive-from = []
-unstable-riscv = []
 
 [dependencies]
 thiserror = "1.0.31"

svd-rs/src/device.rs

@@ -1,5 +1,3 @@
-#[cfg(feature = "unstable-riscv")]
-use super::Riscv;
 use super::{
     BuildError, Cpu, Description, EmptyToNone, Name, Peripheral, RegisterProperties, SvdError,
     ValidateLevel,
@@ -107,14 +105,6 @@ pub struct Device {
     /// Specify the compliant CMSIS-SVD schema version
     #[cfg_attr(feature = "serde", serde(skip, default = "default_schema_version"))]
     pub schema_version: String,
-
-    /// Describe the processor included in the device
-    #[cfg_attr(
-        feature = "serde",
-        serde(default, skip_serializing_if = "Option::is_none")
-    )]
-    #[cfg(feature = "unstable-riscv")]
-    pub riscv: Option<Riscv>,
 }
 
 fn default_xmlns_xs() -> String {
@@ -140,8 +130,6 @@ pub struct DeviceBuilder {
     version: Option<String>,
     description: Option<String>,
     license_text: Option<String>,
-    #[cfg(feature = "unstable-riscv")]
-    riscv: Option<Riscv>,
     cpu: Option<Cpu>,
     header_system_filename: Option<String>,
     header_definitions_prefix: Option<String>,
@@ -164,8 +152,6 @@ impl From<Device> for DeviceBuilder {
             version: Some(d.version),
             description: Some(d.description),
             license_text: d.license_text,
-            #[cfg(feature = "unstable-riscv")]
-            riscv: d.riscv,
             cpu: d.cpu,
             header_system_filename: d.header_system_filename,
             header_definitions_prefix: d.header_definitions_prefix,
@@ -216,12 +202,6 @@ impl DeviceBuilder {
         self.license_text = value;
         self
     }
-    /// Set the riscv of the device.
-    #[cfg(feature = "unstable-riscv")]
-    pub fn riscv(mut self, value: Riscv) -> Self {
-        self.riscv = Some(value);
-        self
-    }
     /// Set the cpu of the device.
     pub fn cpu(mut self, value: Option<Cpu>) -> Self {
         self.cpu = value;
@@ -303,8 +283,6 @@ impl DeviceBuilder {
                 })
                 .ok_or_else(|| BuildError::Uninitialized("description".to_string()))?,
             license_text: self.license_text,
-            #[cfg(feature = "unstable-riscv")]
-            riscv: self.riscv,
             cpu: self.cpu,
             header_system_filename: self.header_system_filename,
             header_definitions_prefix: self.header_definitions_prefix,
@@ -363,10 +341,6 @@ impl Device {
         if builder.license_text.is_some() {
             self.license_text = builder.license_text.empty_to_none();
         }
-        #[cfg(feature = "unstable-riscv")]
-        if builder.riscv.is_some() {
-            self.riscv = builder.riscv;
-        }
         if builder.cpu.is_some() {
             self.cpu = builder.cpu;
         }

svd-rs/src/lib.rs

@@ -94,12 +94,6 @@ pub use self::protection::Protection;
 pub mod datatype;
 pub use self::datatype::DataType;
 
-/// Custom objects for the RISC-V ecosystem
-#[cfg(feature = "unstable-riscv")]
-pub mod riscv;
-#[cfg(feature = "unstable-riscv")]
-pub use self::riscv::Riscv;
-
 /// Level of validation
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 pub enum ValidateLevel {