- Vivado 2021.1
- Vitis 2021.1
-
Open Vivado
- Launch Vivado 2021.1 and open the Tcl Console (located at the bottom).
- Navigate to the project directory:
cd signal_standalone/hdl/projects/signalsdrpro
-
Run Build Scripts
- Load the ADI build script:
source ../scripts/adi_make.tcl
- Compile libraries:
adi_make::lib all
- Generate the Vivado project:
source ./system_project.tcl
- Load the ADI build script:
-
Vitis Project Setup
- Create a new empty workspace in Vitis.
- Copy
app
into the project'ssrc
directory. - Build the application in Vitis.
-
Generate Boot Files
- Use Vivado/Vitis tools to generate the
BOOT
image for hardware deployment.
- Use Vivado/Vitis tools to generate the
- Top-Level HDL
- Updated pin assignments in the top-level design.
- XDC Constraints
- Adjusted pin mappings in the XDC file for hardware compatibility.
- Tcl Scripts
- Modified PS UART configuration and clock pin definitions in the block design (BD).