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Output noise #51
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Nince! Thanks for the lovely data. |
That looks like a pleasantly good fit to the model then. |
If somebody wants to investigate the 150 Hz bump feel free. Otherwise closing. |
Not super important, but do you have a capture with the DACs in quiescent state as well? (I.e. does anything change apart from the clock feedthrough peak disappearing?) |
I would be interesting to check the noise on the reference, both before and after the buffers (though it looks like there are only test points post buffers). What is the P/N of C167 @gkasprow ? Could that be the source of microphonics? |
Are you confident it's not 3*50Hz line noise? |
C167 is generic CC0603_10UF_10V_10%_X5R |
On these quiescence only removes the update feedthrough at 2.55 MHz and multiples. |
I wonder if the 150Hz noise is the related to the offset trim circuitry. It's maybe a little low frequency though? |
This can be easily verified by removing either IC27 / IC2 or R158, R127, R140, and R220. The reference will drop to 3.9V. |
Conditions
channel_index << 11
) at 2.55 MS/s with 21 ns SPI periodtl;dr:
6.9 kHz bandwidth, to 10 MHz
-106 dBV are 60 nVrms/rtHz
6.9 Hz bandwidth, to 10 kHz
-137 dBVrms are 54 nVrms/rtHz
4.8 mHz bandwidth, to 10 Hz
at 0x8000 code, ch27, DC coupled, floating class II power supply
trace A (green) crosscorrelated noise, normalized to 1 Hz (-100 dBVrms/rtHz are 10 uVrms/rtHz)
trace B (blue) is raw channel 1 PSD
trace C (red) is floor
trace D (yellow) is linear time, 20 µV/div over 320 s
No discernible drift, stable to better than 20 µV over 5 minutes. This doesn't test gain/reference stability, just offset and differential tempcos near 0V
0.48 mHz bandwidth, to 1 Hz
model from schematics
setup
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