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Output noise #51

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jordens opened this issue Jan 13, 2020 · 10 comments
Closed

Output noise #51

jordens opened this issue Jan 13, 2020 · 10 comments

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@jordens
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jordens commented Jan 13, 2020

Conditions

  • Kasli, EEM0 -> Fastino channels 24-31 -> IDC-BNC
  • battery powered
  • modules close together (that does not make any difference)
  • in a shielded crate (admittedly not fully RF-tight but that doesn't make a difference)
  • all DACs continuously updating (loading channel_index << 11) at 2.55 MS/s with 21 ns SPI period
  • 1 M impedance, look at the green trace (A), blue (B) is an estimate of the measurement floor
  • using channel 27 which is a pretty clean one (Channel SMPS/switching/SPI/update spur differences #50) at 6.875 V output
  • compare to Zotino: Noise measurement Zotino#27

tl;dr:

  • less than 80 nVrms/rtHz to 500 kHz, 60 nVrms/rtHz typ
  • less than 12 nVrms/rtHz above 2 MHz
  • about 4 nVrms/rtHz at 10 MHz
  • nice, stable, and low noise as by design, no surprises
  • the 150 Hz stuff might be something with the reference or acoustics, and might be worth investigating. The bump disappears at 0 V output.
  • 1/f between 200 Hz and at least 1 mHz: 20 µVrms/rtHz at 1 mHz
  • offset drift less than 50 µV over 24h

6.9 kHz bandwidth, to 10 MHz

-106 dBV are 60 nVrms/rtHz

image

6.9 Hz bandwidth, to 10 kHz

-137 dBVrms are 54 nVrms/rtHz

image

4.8 mHz bandwidth, to 10 Hz

at 0x8000 code, ch27, DC coupled, floating class II power supply

trace A (green) crosscorrelated noise, normalized to 1 Hz (-100 dBVrms/rtHz are 10 uVrms/rtHz)
trace B (blue) is raw channel 1 PSD
trace C (red) is floor
trace D (yellow) is linear time, 20 µV/div over 320 s

No discernible drift, stable to better than 20 µV over 5 minutes. This doesn't test gain/reference stability, just offset and differential tempcos near 0V

image

0.48 mHz bandwidth, to 1 Hz

image

model from schematics

image

setup

image
image

@hartytp
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hartytp commented Jan 13, 2020

Nince! Thanks for the lovely data.

@hartytp
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hartytp commented Jan 13, 2020

That looks like a pleasantly good fit to the model then.

@jordens
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jordens commented Jan 13, 2020

If somebody wants to investigate the 150 Hz bump feel free. Otherwise closing.

@jordens jordens closed this as completed Jan 13, 2020
@dnadlinger
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Not super important, but do you have a capture with the DACs in quiescent state as well? (I.e. does anything change apart from the clock feedthrough peak disappearing?)

@dtcallcock
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I would be interesting to check the noise on the reference, both before and after the buffers (though it looks like there are only test points post buffers).

What is the P/N of C167 @gkasprow ? Could that be the source of microphonics?

@hartytp
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hartytp commented Jan 13, 2020

If somebody wants to investigate the 150 Hz bump feel free. Otherwise closing.

Are you confident it's not 3*50Hz line noise?

@gkasprow
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C167 is generic CC0603_10UF_10V_10%_X5R
True, it could be an ultrasound from SMPS. It would affect the reference.
I would focus on C6 and C9. They are used to generate references for channels 21,22,24,25,27,28,30,31.
In Altium indexes start from 1, not zero.

@jordens
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jordens commented Jan 14, 2020

On these quiescence only removes the update feedthrough at 2.55 MHz and multiples.
The 150 Hz bump is certainly not line noise. 150 Hz line noise is very narrow in Europe and less than 10 Hz even if running on a generator.

@hartytp
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hartytp commented Feb 7, 2020

I wonder if the 150Hz noise is the related to the offset trim circuitry. It's maybe a little low frequency though?

@gkasprow
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This can be easily verified by removing either IC27 / IC2 or R158, R127, R140, and R220. The reference will drop to 3.9V.

@jordens jordens pinned this issue Aug 19, 2021
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