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Extract validate_and_compute_component_sizes and add compile-time LOG…#440

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Extract validate_and_compute_component_sizes and add compile-time LOG…#440
ilyalesokhin-starkware wants to merge 1 commit intomainfrom
ilya/validate_log_sizes

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@ilyalesokhin-starkware ilyalesokhin-starkware commented Mar 31, 2026

…_SIZE_BITS assert

Refactor component log size validation into a dedicated function and replace assert_not_all_ones with an explicit check that no component log size equals 31 (which would overflow M31). Add compile-time asserts that LOG_SIZE_BITS is 5.


Note

Medium Risk
Touches verifier/circuit constraint logic around component size range checking; a mistake could weaken soundness or reject valid proofs, but the change is localized and adds explicit safety checks.

Overview
Refactors component log-size validation in stark_verifier by extracting it into validate_and_compute_component_sizes, and replaces the previous assert_not_all_ones bit-product check with an explicit constraint that no component log size equals 31 (avoiding M31 overflow when computing 2^log_size).

Removes Simd::assert_not_all_ones from circuits::simd and adds compile-time asserts enforcing LOG_SIZE_BITS == 5 (including an additional guard tied to pow2 overflow assumptions), along with padding-aware validation using SECURE_EXTENSION_DEGREE.

Reviewed by Cursor Bugbot for commit 3fc35e4. Bugbot is set up for automated code reviews on this repo. Configure here.

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…_SIZE_BITS assert

Refactor component log size validation into a dedicated function and replace
assert_not_all_ones with an explicit check that no component log size equals 31
(which would overflow M31). Add compile-time asserts that LOG_SIZE_BITS is 5.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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