fix(schematic): render electrical pin directions

[KrishnaX12]

Summary

• Render Altium pin-direction markers from each schematic pin electrical type by default.
• Input pins point toward the component, output pins point away, and I/O pins use the Altium diamond marker.
• Reserve one common marker slot so all pin designators align at a constant offset from the component edge.
• Passive, HiZ, and power pins remain unmarked while their designators stay aligned with marked pins.
• Preserve explicit inner/outer pin symbols: clock and inversion symbols take precedence over the automatic electrical marker.
• Allow callers to restore plain rendering with showPinDirections: false.

Root Cause

The SVG serializer parsed ELECTRICAL but did not use it when rendering schematic pins. Missing ELECTRICAL values in binary SchDoc records represent Altium default input pins and are handled accordingly.

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Visual Verification: altiumts (Fixed) vs Altium 365 Viewer (Reference)

Component / Sheet	altiumts (Fixed)	Altium 365 Viewer (Ground Truth)
TI TMDS62LEVM: U61 (Sheet 12)
TI TMDS62LEVM: U57 (Sheet 13)
TI TMDS62LEVM: U121 (Sheet 14)
TI TMDS62LEVM: U71 JTAG/MDIO (Sheet 33)
Designator Constant Offset Alignment
Edge-Symbol Precedence (Clock/Invert)

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Testing

• Added real binary regression coverage for the exact TI TMDS62LEVM components shown in the report: U61 on sheet 12, U57 on sheet 13, U121 on sheet 14, and U71 JTAG/MDIO pins on sheet 33.
• Added a mixed-electrical-type assertion proving that visible pin designators use one consistent offset from the component body.
• Added coverage for the showPinDirections: false opt-out using those real records.
• Added an assertion that existing clock/inversion pin-symbol rendering remains free of automatic direction markers; its snapshot is byte-for-byte unchanged from main.
• Regenerated 52 existing schematic SVG snapshots; no synthetic snapshot was added.
• All 122 SVG tests, typechecks, formatting, package build, and site build pass.

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