Add all ti-sysblocks chip recommendations

.gitattributes

@@ -0,0 +1 @@
+*.snap.svg -whitespace

.github/workflows/reference-schematics.yml

@@ -0,0 +1,31 @@
+name: TI Reference Schematics
+
+on:
+  push:
+    branches: [main]
+  pull_request:
+    branches: [main]
+
+jobs:
+  reference-schematics:
+    runs-on: ubuntu-latest
+    timeout-minutes: 20
+    env:
+      CI: "true"
+
+    steps:
+      - uses: actions/checkout@v4
+
+      - name: Setup bun
+        uses: oven-sh/setup-bun@v2
+        with:
+          bun-version: latest
+
+      - name: Install dependencies
+        run: bun install
+
+      - name: Validate reference evidence
+        run: bun run validate:ti-reference-examples
+
+      - name: Check schematic snapshots
+        run: bun run snapshot:schematics

README.md

@@ -57,6 +57,49 @@ export default () => (
 chip footprint for that short-name export. New code should use readable package
 names such as `vqfn_16_ep_3x3` or `sot_23_5`.
 
+### TI sysblocks catalog
+
+Every TI product recommendation referenced by
+[`tscircuit/ti-sysblocks`](https://github.com/tscircuit/ti-sysblocks) is
+available as a raw chip export. The source diagrams contain generic TI product
+numbers rather than orderable package variants, so this package records one
+canonical exact manufacturer part number and package for each of the 800
+generated family entries, while reusing the repository's 10 existing family
+definitions. Import the family name for convenience or the exact MPN-named
+component when the package choice must be explicit.
+
+```tsx
+import {
+  AMC0300D,
+  AMC0300DDWVR,
+  TiSysblocksChipComponents,
+} from "@tsci/tscircuit.ti"
+
+const CanonicalFamilyPart = AMC0300D
+const ExactPackagePart = AMC0300DDWVR
+const SameFamilyFromMap = TiSysblocksChipComponents.AMC0300D
+```
+
+The complete mapping and TI links for all 810 families are in
+[`lib/chips/ti-sysblocks-chip-catalog.json`](lib/chips/ti-sysblocks-chip-catalog.json).
+It also records the canonical MPN, package code, pin count, package drawing,
+and supplier provenance for the 800 generated entries. The migration uses 689
+direct JLCPCB imports, 111 official TI datasheet package selections, and 10
+definitions that were already present in this repository.
+
+Some TI names are not valid JavaScript identifiers. Family exports replace
+punctuation with underscores (for example, `AMC0311D-Q1` becomes
+`AMC0311D_Q1`), and a leading digit gets the `TI_` prefix (for example,
+`74ACT16244` becomes `TI_74ACT16244`). The catalog is the authoritative mapping.
+
+Generated schematic boxes group power pins on top, ground and exposed-pad pins
+on the bottom, inputs and controls on the left, and outputs on the right. Pins
+inside a functional group retain tscircuit's standard 0.2 mm adjacent spacing;
+only a 0.2 mm margin is added between distinct groups. Footprints imported from
+JLCPCB retain their LCSC number and CAD model. Datasheet-sourced components use
+the exact TI package-drawing identifier, never package code and pin count alone,
+so mechanically different drawing revisions are not conflated.
+
 ## Connecting to Pins Inside a Subcircuit
 
 Imported TI parts are subcircuits. To connect an external component to a pin
@@ -138,9 +181,10 @@ The package currently exports these subcircuit components:
 
 ## Exported Chips
 
-The package also exports these low-level chip components from `lib/chips`. Each
-chip is listed individually below, including whether it supports a
-`footprintVariant` selector on the short-name export.
+In addition to the complete sysblocks catalog above, the package retains its
+hand-written short-name wrappers and legacy raw-chip exports. The table below
+highlights those wrappers, including whether they support a `footprintVariant`
+selector. It is not the complete 810-family catalog.
 
 | Chip Export | `footprintVariant` | Underlying Component Export |
 | --- | --- | --- |
@@ -161,7 +205,7 @@ chip is listed individually below, including whether it supports a
 | `MSP430G2230ID` | `-` | `MSP430G2230ID` |
 | `MSP430F5229` | `-` | `MSP430F5229IRGCR` |
 | `MSPM0G3507` | `lqfp_64` | `MSPM0G3507SPMR` |
-| `TLV755P` | `sot_23_5` | `TLV75533PDBVR` | 
+| `TLV755P` | `sot_23_5` | `TLV75533PDBVR` |
 | `TAS2505` | `-` | `TAS2505` |
 | `TMP1827` | `-` | `TMP1827` |
 | `TMP1075` | `wson_8_ep_2x2` | `TMP1075DSGR` |
@@ -198,7 +242,9 @@ The package also exports:
 The `lib/chips` directory contains the low-level TI chip components. Most files
 represent an individual manufacturer part number and define details such as pin
 labels, aliases, supplier part numbers, and the physical footprint used by
-tscircuit.
+tscircuit. Chip definitions are ordinary `*.tsx` component modules; the
+`*.circuit.tsx` suffix is reserved for runnable circuit entrypoints such as
+reference examples, subcircuits, and simulations.
 
 Import chips from the package entrypoint by their short names, such as
 `BQ24074`, `INA237`, or `TPS7A02`. The underlying MPN-named definitions remain
@@ -221,6 +267,40 @@ For example, `PowerMonitor_INA237` comes from
 The `lib/subcircuits/__snapshots__` directory contains generated schematic and
 PCB SVG snapshots used to check visual output.
 
+### `examples`
+
+The `examples` directory contains runnable `*.circuit.tsx` TI reference
+schematics. Their checked-in snapshots are schematic-only so the reference
+component placement and wiring can be reviewed without running analog
+simulations or generating PCB output.
+
+The curated set currently contains 21 evidence-backed blocks spanning power
+regulation, battery charging, load switching, LED and motor driving, op-amp
+filters, current and temperature sensing, ADC front ends, logic, CAN, clocks,
+wireless, and timing. Every file
+named-exports its reusable block and default-exports the same component. They
+are also available from the package entrypoint and from the typed
+`TiReferenceBlockComponents` map:
+
+```tsx
+import {
+  OPA320_SecondOrderLowPassFilter,
+  TiReferenceBlockComponents,
+} from "@tsci/tscircuit.ti"
+
+const SameBlock = TiReferenceBlockComponents.OPA320_SecondOrderLowPassFilter
+```
+
+Only circuits with a clear first-party TI schematic are included. A family is
+skipped when its public documentation does not provide enough connectivity and
+placement evidence to reproduce a useful block.
+
+Examples declare electrical connectivity with ordinary `<trace>` elements and
+let tscircuit autoroute their schematic paths. Validation rejects manual
+schematic geometry, `<schematictext>`, custom drawing symbols, and
+`schematicRouteHints`; when autorouting cannot reproduce a readable TI layout,
+the example is omitted from the curated set.
+
 ### `lib/simulations`
 
 The `lib/simulations` directory contains example circuits for simulation-focused
@@ -231,6 +311,10 @@ Simulation examples may use model data from `lib/chips/spice-models`. The
 `lib/simulations/__snapshots__` directory stores generated schematic and
 simulation SVG snapshots.
 
+CI maps the configured SPICE engines to a no-op engine and checks only the
+curated reference manifest and schematic snapshots. Local simulation engines
+remain enabled.
+
 
 ## Development
 
@@ -258,9 +342,38 @@ Run TypeScript checks:
 bun run typecheck
 ```
 
+Regenerate and validate the sysblocks export surface after changing the
+machine-readable catalog:
+
+```bash
+bun run generate:ti-sysblocks
+bun run validate:ti-sysblocks
+```
+
+Reference examples are registered in `examples/ti-reference-examples.json`
+with the exact TI figure used for connectivity and schematic placement. The
+validator checks that every registered block has fresh source, first-party TI
+evidence, and exactly one schematic snapshot. The library intentionally samples
+families with useful public reference circuits instead of inventing examples for
+parts without one. Full-catalog coverage remains available as an optional audit:
+
+```bash
+bun run validate:ti-reference-examples
+bun scripts/validate-ti-reference-examples.ts --verify-evidence
+bun scripts/validate-ti-reference-examples.ts --require-complete
+```
+
 Update visual snapshots when intentional schematic, PCB, or simulation output
 changes:
 
 ```bash
 bun run snapshot:update
 ```
+
+Check or update only the schematic snapshots for TI reference examples. These
+commands skip simulation and PCB output:
+
+```bash
+bun run snapshot:schematics
+bun run snapshot:schematics:update
+```

biome.json

@@ -5,6 +5,9 @@
     "clientKind": "git",
     "useIgnoreFile": true
   },
+  "files": {
+    "maxSize": 3000000
+  },
   "formatter": {
     "indentStyle": "space"
   }

examples/ADS7042_DirectSensorInterface.circuit.tsx

@@ -0,0 +1,140 @@
+import "tscircuit";
+import { ADS7042IDCUT } from "../lib/chips/ADS7042IDCUT.tsx";
+
+/**
+ * TI ADS7042 datasheet (SBAS608C), "Interfacing the Device Directly with Sensors":
+ * https://www.ti.com/document-viewer/ADS7042/datasheet/application_and_implementation#SBAS608129
+ * https://www.ti.com/ods/images/SBAS608C/apps_sys_sensor_bas608.gif
+ *
+ * TI labels the sensor's ROUT and CFLT but does not prescribe values, so both
+ * stay symbolic. The digital pins are exposed to make this analog front-end a
+ * reusable block; the TI figure intentionally focuses only on the sensor path.
+ */
+export const ADS7042_DirectSensorInterface = () => (
+  <board routingDisabled schMaxTraceDistance={20}>
+    <ADS7042IDCUT
+      name="U1"
+      displayName="ADS7042"
+      schX={1}
+      schY={0}
+      schPinArrangement={{
+        leftSide: {
+          direction: "top-to-bottom",
+          pins: ["pin6", "pin5"],
+        },
+        rightSide: {
+          direction: "top-to-bottom",
+          pins: ["pin2", "pin3", "pin4"],
+        },
+        topSide: {
+          direction: "left-to-right",
+          pins: ["pin7", "pin1"],
+        },
+        bottomSide: { direction: "left-to-right", pins: ["pin8"] },
+      }}
+      schWidth={2.25}
+      schHeight={2.6}
+    />
+
+    <schematicsymbol
+      name="SENSOR_POS"
+      displayName="Sensor +"
+      symbolName="testpoint_left"
+      schX={-3.55}
+      schY={0.45}
+    />
+    <schematicsymbol
+      name="SENSOR_NEG"
+      displayName="Sensor -"
+      symbolName="testpoint_left"
+      schX={-3.55}
+      schY={-0.45}
+    />
+    <schematicsymbol
+      name="R_OUT"
+      displayName="ROUT"
+      symbolName="resistor_right"
+      schX={-2.1}
+      schY={0.45}
+    />
+    <schematicsymbol
+      name="C_FILTER"
+      displayName="CFLT"
+      symbolName="capacitor_down"
+      schX={-1}
+      schY={0}
+    />
+
+    <schematicsymbol
+      name="AVDD"
+      displayName="AVDD"
+      symbolName="rail_up"
+      schX={0.6}
+      schY={1.85}
+    />
+    <schematicsymbol
+      name="DVDD"
+      displayName="DVDD"
+      symbolName="rail_up"
+      schX={1.4}
+      schY={1.85}
+    />
+    <schematicsymbol
+      name="GND_SENSOR"
+      displayName=""
+      symbolName="digital_ground_up"
+      schX={-3.55}
+      schY={-1.15}
+    />
+    <schematicsymbol
+      name="GND_DEVICE"
+      displayName=""
+      symbolName="digital_ground_up"
+      schX={1}
+      schY={-1.85}
+    />
+    <schematicsymbol
+      name="SCLK"
+      displayName="SCLK"
+      symbolName="testpoint_right"
+      schX={3.5}
+      schY={0.65}
+    />
+    <schematicsymbol
+      name="SDO"
+      displayName="SDO"
+      symbolName="testpoint_right"
+      schX={3.5}
+      schY={0}
+    />
+    <schematicsymbol
+      name="CS"
+      displayName="CS"
+      symbolName="testpoint_right"
+      schX={3.5}
+      schY={-0.65}
+    />
+
+    <net name="GND" isGroundNet connectsTo={["GND_SENSOR.1", "GND_DEVICE.1"]} />
+    <trace from=".SENSOR_POS > .1" to=".R_OUT > .pin1" />
+    <trace from=".R_OUT > .pin2" to=".U1 > .pin6" />
+    <trace from=".C_FILTER > .pin1" to=".R_OUT > .pin2" />
+    <trace
+      path={[
+        ".C_FILTER > .pin2",
+        ".U1 > .pin5",
+        ".SENSOR_NEG > .1",
+        ".GND_SENSOR > .1",
+      ]}
+    />
+
+    <trace from=".AVDD > .1" to=".U1 > .pin7" />
+    <trace from=".DVDD > .1" to=".U1 > .pin1" />
+    <trace from=".U1 > .pin8" to=".GND_DEVICE > .1" />
+    <trace from=".U1 > .pin2" to=".SCLK > .1" />
+    <trace from=".U1 > .pin3" to=".SDO > .1" />
+    <trace from=".U1 > .pin4" to=".CS > .1" />
+  </board>
+);
+
+export default ADS7042_DirectSensorInterface;