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Add LMK1C1104 clock buffer subcircuit - #114

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seveibar merged 7 commits into
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agent/add-lmk1c1104-clock-buffer
Aug 26, 2026
Merged

Add LMK1C1104 clock buffer subcircuit#114
seveibar merged 7 commits into
mainfrom
agent/add-lmk1c1104-clock-buffer

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@seveibar seveibar commented Aug 25, 2026

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Summary

  • add ClockBuffer_LMK1C1104, filling the Clocks & timingClock buffers category represented in ti-sysblocks
  • add and export the LMK1C1104 TSSOP-8 chip model
  • reproduce the functional drawing area of TI's LMK1C1104EVM Altium schematic with all 64 components, 160 ports, the input/power/output topology, Y0–Y7 validation fixtures, and the source's DNP population state
  • expose CLKIN, OE, VDD, GND, and the four driven outputs Y0Y3 through exposedNets; use connected native <netlabel> elements for the public signal endpoints
  • retain Y4–Y7 only as internal DNP validation-fixture nets because the four-output LMK1C1104 does not drive them
  • preserve all 36 circuit-body engineering-note lines with <schematictext> while omitting their background frames; the Altium sheet border, TI title block/logo, parameter fields, and legal/footer boilerplate are intentionally omitted
  • update generated schematic and routed PCB snapshots

OE is the public API alias for TI's 1G pin/net label because tscircuit net selectors cannot begin with a digit. The chip symbol still identifies the physical pin as 1G.

Consumers can instantiate the subcircuit and connect through the exposed parent nets, for example net.CLKIN, net.OE, and net.Y0net.Y3.

Reference and conversion

HSDC078A_Validation_Board_Schematic.SchDoc was converted with altium-to-circuit-json v0.0.13 (97e5b2e4bb9acba337af0de07d74287e5e089f2a) using:

bun run scripts/convert-single-reference.ts HSDC078A_Validation_Board_Schematic.SchDoc schematic.circuit.json

The normalized conversion contains 917 Circuit JSON elements and validates cleanly. Altium stored 49 passive MPNs in Comment while hiding their electrical values in Value; normalization restored those resistor/capacitor values before validation.

Provenance hashes:

  • SNAR039.ZIP: 2fd36888e5713ba79fe4f79e41332dc87eed296656d6cd5785cbf95bcabc4781
  • main .SchDoc: 787e4a3067ffd033d45af0b09c6bccdf704f1e3801d38eaa9f99ae3af644d761
  • normalized Circuit JSON: 4ed3e68e6e4558bf9fbf0a42ccd8b46ad63c5e0bc9d1ef2857f924933399a55c

The Altium PCB document is an unsynchronized 16-pin LMK1C1108 validation layout. The schematic and BOM identify the actual LMK1C1104 as PW0008A TSSOP-8, so this implementation uses the correct 8-pin footprint and a newly routed PCB snapshot rather than claiming literal PCB reproduction.

Validation

  • bun run typecheck
  • bun run format:check
  • bunx tsci build lib/subcircuits/ClockBuffer_LMK1C1104.circuit.tsx
  • bunx tsci snapshot lib/subcircuits/ClockBuffer_LMK1C1104.circuit.tsx --test --concurrency 1
  • git diff --check
  • nested-consumer audit of every exposed-net bridge
  • root export/map smoke check
  • Circuit JSON audit: 64 source/schematic/PCB components, 160 source/schematic/PCB ports, 114 source traces, 91 schematic traces, 106 PCB traces, 36 vias, 12 explicit nets, correct ground/power flags, and zero *_error records

The nested-consumer audit verifies parent connectivity for exactly CLKIN, OE, VDD, GND, and Y0Y3, while Y4–Y7 remain scoped to their DNP fixtures.

The build succeeds. Its remaining placement warnings come from retaining TI's tightly packed validation-fixture geometry; supplier-footprint IoU and unnamed-trace messages are non-fatal.

Related work

Open PR #112 contains a datasheet-derived LMK1C1104 example and a different package variant, but it does not add a reusable component under lib/subcircuits. This PR uses the TSSOP-8 package from the Altium EVM schematic/BOM.

@seveibar

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CI note: the hosted tscircuit/build job was retried and failed twice with the infrastructure-classified error ReadableStream received over RPC disconnected prematurely, after circuit builds and CJS output completed. I reproduced the exact hosted command locally — bunx tscircuit build --ci --concurrency 4 --ignore-warnings — and it completed successfully with type declarations written, all 120 circuits passing, and exit code 0. This appears isolated to the hosted RPC runner rather than the PR code.

@seveibar seveibar changed the title Add LMK1C1104 clock buffer subcircuit from TI EVM Add LMK1C1104 clock buffer subcircuit from TI Altium reference Aug 26, 2026
@seveibar seveibar changed the title Add LMK1C1104 clock buffer subcircuit from TI Altium reference Add LMK1C1104 clock buffer subcircuit Aug 26, 2026
@seveibar
seveibar merged commit 4de3e46 into main Aug 26, 2026
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@seveibar
seveibar deleted the agent/add-lmk1c1104-clock-buffer branch August 26, 2026 05:47
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Thank you for your contribution! 🎉

PR Rating: ⭐⭐
Impact: Minor

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