Add TIDEP-0092 obstacle sensor system power supply

[AnasSarkiz]

Summary

• add the Obstacle Detection Sensor System Power Supply subsystem (21584) as six independently renderable native tscircuit modules plus the reusable SystemPowerSupply composite
• reconstruct the official TIDEP-0092 Rev C PMIC, 1.8 V LDO, dual 1.3 V LDO, and VPP sections with source component centers, orientations, reference designators, parts, pin mappings, nets, and section boundaries
• add exact chip definitions for LP87524BRNFRQ1, TPS7A8101QDRBRQ1, TPS7A8801RTJR, TPS79601DRBR, and LM4060A33EDBZR
• use native <schematicsheet>, <schematicsection>, symbols, and <trace from=... to=...> autorouting only—no route hints, manual trace paths, custom schematic graphics, or numeric schSize
• audit label semantics across every System Power sheet: render TI off-sheet ports with native on-trace schDisplayLabel, retain <netlabel> only for TI net-label records and native power/ground symbols, and keep physical TI wires as real traces
• follow reusable tscircuit naming: exact manufacturer part numbers for chips, electrical functions for child subcircuits, SystemPowerSupply for the composite, and ObstacleDetectionSensor for the application example
• retain TI reference IDs only in source comments, source links, documentation, test descriptions, and this PR description
• keep examples/ObstacleDetectionSensor.circuit.tsx minimal while composing both SystemPowerSupply and the current-main RadarFrontEndProcessing module from PR Add TIDEP-01024 radar front-end modules #165

System-block context

• TI Obstacle Detection Sensor — variant 35081, System Power Supply subsystem 21584
• TIDEP-0092 Short Range Radar Reference Design Using AWR1642
• related radar subsystem work: PR #165
• related recommended-device work: PR #112
• implementation/review style example: PR #129

Official source set

• TIDEP-0092 design guide — TIDUD36B
• Rev C schematic and block diagram — TIDRQR8
• bill of materials — TIDRQR9
• Altium CAD/CAE package — SPRR261A
• LP87524B-Q1 datasheet
• TPS7A8101-Q1 datasheet
• TPS7A88 datasheet
• TPS796 datasheet
• LM4060 datasheet

The downloaded source archive was verified before use. SPRR261A.ZIP contains the Rev C Altium project and the relevant editable schematic files:

• PROC011C_PMIC.SchDoc
• PROC011C_LDO_01 (1.8V Output).SchDoc
• PROC011C_LDO_02 (1.3V Output).SchDoc
• PROC011C_VPP_Supply.SchDoc

The published TIDRQR8.PDF remains authoritative where its visible VPP layout differs from the downloadable Altium conversion. The LM4060 module is explicitly datasheet-derived from Figure 9-1 and Section 9.2.1.2; it is not presented as a TIDEP-0092 board section and does not claim editable reference-board coordinates.

Extracted modules and files

Exact-MPN chips

• lib/chips/LP87524BRNFRQ1.circuit.tsx — LP87524BRNFRQ1
• lib/chips/TPS7A8101QDRBRQ1.circuit.tsx — TPS7A8101QDRBRQ1
• lib/chips/TPS7A8801RTJR.circuit.tsx — TPS7A8801RTJR
• lib/chips/TPS79601DRBR.circuit.tsx — TPS79601DRBR
• lib/chips/LM4060A33EDBZR.circuit.tsx — LM4060A33EDBZR

Independently renderable functional subcircuits

• lib/subcircuits/PmicPowerStage_LP87524B.circuit.tsx — PmicPowerStage_LP87524B
• lib/subcircuits/PmicSequencer.circuit.tsx — PmicSequencer
• lib/subcircuits/LdoRegulator1V8_TPS7A8101.circuit.tsx — LdoRegulator1V8_TPS7A8101
• lib/subcircuits/DualLdoRegulator1V3_TPS7A8801.circuit.tsx — DualLdoRegulator1V3_TPS7A8801
• lib/subcircuits/VppLdoRegulator_TPS79601.circuit.tsx — VppLdoRegulator_TPS79601
• lib/subcircuits/PrecisionVoltageReference_LM4060A33.circuit.tsx — PrecisionVoltageReference_LM4060A33

Composite and application

• lib/subcircuits/SystemPowerSupply.circuit.tsx — reusable SystemPowerSupply composite
• examples/ObstacleDetectionSensor.circuit.tsx — application-named example

The PMIC source page is divided into native schematic sections for input decoupling, the main LP87524B stage, PMIC control divider, enable pull-ups, PGOOD output, and switching-node snubbers. LDO 01 and LDO 02 retain their official functional section boundaries.

Coordinate mapping

• PMIC page 9 uses schematic = PDF point -> mm -> tscircuit schematic unit, with x = (pdfX - 612) * (25.4 / 72) / (10.16 / 1.1) and y = (403.2 - pdfY) * (25.4 / 72) / (10.16 / 1.1).
• LDO 01 uses schX = (sourceX - 690) * 0.0375, schY = (sourceY - 520) * 0.0375.
• LDO 02 uses schX = (sourceX - 670) * 0.0275, schY = (sourceY - 550) * 0.0275.
• VPP placement is digitized from TIDRQR8 page 7 and locked by center/orientation tests.

Connectivity and visual validation

• important power, enable, reset, PGOOD, feedback, ground, and output nets have focused connectivity assertions
• component sets and manufacturer part numbers are checked per section
• production naming has a regression test that rejects TI reference IDs and application names in System Power filenames and exported component names
• source component centers and requested 180-degree pin orders are locked by tests
• P7 uses the source top-side [1, 2] port arrangement and both pins connect to VPP_1P7
• U11 GND and exposed pad are physically traced together before the single TI GND symbol; LDO 02 R120/R119 are physically traced at SS_CTRL before the single TI label
• every System Power source file is checked to reject route hints, manual trace paths, custom schematic graphics, and schSize
• native ANSI-B sheet support is preserved by pinning direct @tscircuit/core development use to 0.0.1787
• the six renamed System Power snapshots are byte-identical to their pre-rename versions; the application snapshot was refreshed only because current main now composes radar and power together
• no unrelated snapshot update remains in the PR diff

Reference vs generated schematics

Each PNG places the official TI reference on the left and the native tscircuit output on the right. The links are pinned to commit 09d4bece9677a5eba88bb7586bae879dc5a8cb53.

1. PMIC power stage

2. PMIC sequencer

3. LDO 01 — 1.8 V

4. LDO 02 — dual 1.3 V

5. VPP supply LDO

6. LM4060 precision reference

Validation

• bun install — pass
• bun run format:check — pass (330 files)
• bun run typecheck — pass
• focused System Power + radar tests — pass (16/16)
• bun test — pass (115/115, 512 assertions)
• bun run build — pass (236/236 circuits, exit 0; existing repository warnings remain)
• focused application schematic snapshot — regenerated and inspected
• local tsci dev visual inspection — completed across all System Power sheets

Known limitations

• TIDRQR8’s exact PMIC inductor pitch produces native overlap warnings for L1–L4; their official source centers are intentionally preserved rather than moved to hide the warning.
• The LDO 02 source placement produces small native overlap warnings around C28, C35, C36, C46, and R122; source centers remain unchanged.
• Native schematic autorouter bends are allowed to differ from Altium, but the implementation uses no manual paths or route hints and preserves electrical connectivity.
• The LM4060 application is datasheet-derived and therefore does not claim exact Altium/reference-board coordinates.

[vercel]

The latest updates on your projects. Learn more about Vercel for GitHub.

Project	Deployment	Actions	Updated (UTC)
ti-system-block-ui	Ready	Preview	Aug 28, 2026 5:11pm

[tscircuit]

The latest updates on your projects. Learn more about tscircuit for Git ↗︎

Package	Deployment	Preview	Comment	Updated (UTC)
tscircuit/ti	✅ Ready	Preview	Package build successful	Thu, 27 Aug 2026 15:58:53 GMT

---

_{📦 Built with tscircuit}

[tscircuit]

The latest updates on your projects. Learn more about tscircuit for Git ↗︎

Package	Deployment	Preview	Comment	Updated (UTC)
tscircuit/ti	✅ Ready	Preview	Package build successful	Thu, 27 Aug 2026 16:24:45 GMT

---

_{📦 Built with tscircuit}

[tscircuit]

The latest updates on your projects. Learn more about tscircuit for Git ↗︎

Package	Deployment	Preview	Comment	Updated (UTC)
tscircuit/ti	✅ Ready	Preview	Package build successful	Thu, 27 Aug 2026 17:16:35 GMT

---

_{📦 Built with tscircuit}