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Petr Belyaev committed Mar 5, 2018
1 parent bd74c9d commit 54e747f
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Showing 14 changed files with 242 additions and 248 deletions.
272 changes: 143 additions & 129 deletions AsmParser/EpiphanyAsmParser.cpp
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1 change: 1 addition & 0 deletions EpiphanyAsmPrinter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -269,6 +269,7 @@ void EpiphanyAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
case EpiphanyII::MO_PCREL32:
O << "%pcrel(";
break;
default:break;
}

switch (MO.getType()) {
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26 changes: 13 additions & 13 deletions EpiphanyFpuConfigPass.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -23,8 +23,8 @@ using namespace llvm;

char EpiphanyFpuConfigPass::ID = 0;

INITIALIZE_PASS_BEGIN(EpiphanyFpuConfigPass, "epiphany_fpu_config", "Epiphany FPU/IALU2 Config", false, false);
INITIALIZE_PASS_END(EpiphanyFpuConfigPass, "epiphany_fpu_config", "Epiphany FPU/IALU2 Config", false, false);
INITIALIZE_PASS_BEGIN(EpiphanyFpuConfigPass, "epiphany_fpu_config", "Epiphany FPU/IALU2 Config", false, false)
INITIALIZE_PASS_END(EpiphanyFpuConfigPass, "epiphany_fpu_config", "Epiphany FPU/IALU2 Config", false, false)

void EpiphanyFpuConfigPass::insertConfigInst(MachineBasicBlock *MBB, MachineBasicBlock::iterator MBBI,
MachineRegisterInfo &MRI, const EpiphanySubtarget &ST, unsigned frameIdx) {
Expand Down Expand Up @@ -58,12 +58,12 @@ bool EpiphanyFpuConfigPass::runOnMachineFunction(MachineFunction &MF) {
Epiphany::IMSUBrr_r16, Epiphany::IMSUBrr_r32};

// Prepare binary flag and regs
bool hasFPU;
bool hasIALU2;
bool hasFPU = false;
bool hasIALU2 = false;

// Step 1: Loop over all of the basic blocks to find the first FPU instruction
for(MachineFunction::iterator it = MF.begin(), E = MF.end(); it != E; ++it) {
MachineBasicBlock *MBB = &*it;
for (auto &it : MF) {
MachineBasicBlock *MBB = &it;
// Loop over all instructions search for FPU instructions
for(MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end(); MBBI != MBBE; ++MBBI) {
MachineInstr *MI = &*MBBI;
Expand Down Expand Up @@ -94,7 +94,7 @@ bool EpiphanyFpuConfigPass::runOnMachineFunction(MachineFunction &MF) {
MF.insert(MF.begin(), MBB);
MBB->addSuccessor(Front);
// Add function live-ins so that they'll be defined in every path
for (MachineRegisterInfo::livein_iterator LB = MRI.livein_begin(), LE = MRI.livein_end(); LB != LE; ++LB) {
for (auto LB = MRI.livein_begin(), LE = MRI.livein_end(); LB != LE; ++LB) {
MBB->addLiveIn(LB->first);
}
// Create config regs for both cases
Expand Down Expand Up @@ -144,8 +144,8 @@ bool EpiphanyFpuConfigPass::runOnMachineFunction(MachineFunction &MF) {
// FIXME: config based on on successors and first use
std::vector<PredState> lastState(blockCount, PRED_START);
if (hasFPU && hasIALU2) {
for(MachineFunction::iterator it = MF.begin(), E = MF.end(); it != E; ++it) {
MachineBasicBlock *MBB = &*it;
for (auto &it : MF) {
MachineBasicBlock *MBB = &it;
int blockNumber = MBB->getNumber();
// Loop over all instructions search for FPU instructions
for(MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end(); MBBI != MBBE; ++MBBI) {
Expand All @@ -171,7 +171,7 @@ bool EpiphanyFpuConfigPass::runOnMachineFunction(MachineFunction &MF) {
}
// Propagate current flag state to all successors, setting state to MIXED if they
// already have some other state except start
for (MachineBasicBlock::succ_iterator MBBI = MBB->succ_begin(), MBBE = MBB->succ_end(); MBBI != MBBE; ++MBBI) {
for (auto MBBI = MBB->succ_begin(), MBBE = MBB->succ_end(); MBBI != MBBE; ++MBBI) {
MachineBasicBlock *successor = *MBBI;
int succNumber = successor->getNumber();
if (lastState[succNumber] == PRED_START) {
Expand All @@ -186,8 +186,8 @@ bool EpiphanyFpuConfigPass::runOnMachineFunction(MachineFunction &MF) {
// Step 4 - resolving loops and predeccessors
// Run on every block until we hit the first IALU/FPU inst and check ALL predeccessors
if (hasFPU && hasIALU2) {
for(MachineFunction::iterator it = MF.begin(), E = MF.end(); it != E; ++it) {
MachineBasicBlock *MBB = &*it;
for (auto &it : MF) {
MachineBasicBlock *MBB = &it;
int blockNumber = MBB->getNumber();
// Loop over all instructions search for FPU instructions
for(MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end(); MBBI != MBBE; ++MBBI) {
Expand All @@ -201,7 +201,7 @@ bool EpiphanyFpuConfigPass::runOnMachineFunction(MachineFunction &MF) {
bool isIALU2 = std::find(std::begin(opcodesIALU2), std::end(opcodesIALU2), MI->getOpcode()) != std::end(opcodesIALU2);
if (isFPU || isIALU2) {
// Check all predeccessors
for (MachineBasicBlock::pred_iterator PBBI = MBB->pred_begin(), PBBE = MBB->pred_end(); PBBI != PBBE; ++PBBI) {
for (auto PBBI = MBB->pred_begin(), PBBE = MBB->pred_end(); PBBI != PBBE; ++PBBI) {
MachineBasicBlock *pred = *PBBI;
int predNumber = pred->getNumber();
// Remember than now we can be, for example, in mixed state
Expand Down
38 changes: 11 additions & 27 deletions EpiphanyFrameLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -68,22 +68,16 @@ void EpiphanyFrameLowering::emitPrologue(MachineFunction &MF,
assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
MachineFrameInfo &MFI = MF.getFrameInfo();
MachineModuleInfo &MMI = MF.getMMI();
EpiphanyMachineFunctionInfo *FI = MF.getInfo<EpiphanyMachineFunctionInfo>();

const EpiphanyInstrInfo &TII =
*static_cast<const EpiphanyInstrInfo*>(STI.getInstrInfo());
const EpiphanyRegisterInfo &RegInfo =
*static_cast<const EpiphanyRegisterInfo *>(STI.getRegisterInfo());
const EpiphanyInstrInfo &TII = *STI.getInstrInfo();

MachineBasicBlock::iterator MBBI = MBB.begin();
DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
EpiphanyABIInfo ABI = STI.getABI();
unsigned SP = Epiphany::SP;
unsigned LR = Epiphany::LR;
unsigned FP = Epiphany::FP;
unsigned STRi64_pmd = Epiphany::STRi64_pmd;
unsigned ADDri_r32 = Epiphany::ADDri_r32;
const TargetRegisterClass *RC = &Epiphany::GPR32RegClass;
unsigned CFIIndex;

// First, compute final stack size.
Expand All @@ -98,7 +92,6 @@ void EpiphanyFrameLowering::emitPrologue(MachineFunction &MF,
if (StackSize == 0 && !MFI.adjustsStack()) return;

const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
MachineLocation DstML, SrcML;

// Create label for prologue
MCSymbol *FrameLabel = MF.getContext().createTempSymbol();
Expand Down Expand Up @@ -126,7 +119,7 @@ void EpiphanyFrameLowering::emitPrologue(MachineFunction &MF,
const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();

// Spill all callee-saves
if (CSI.size()) {
if (!CSI.empty()) {
// Find the instruction past the last instruction that saves a callee-saved
// register to the stack.
for (unsigned i = 0; i < CSI.size(); ++i)
Expand All @@ -135,9 +128,9 @@ void EpiphanyFrameLowering::emitPrologue(MachineFunction &MF,
// Iterate over list of callee-saved registers and emit .cfi_offset
// directives.
DEBUG(dbgs() << "\nCallee-saved regs spilled in prologue\n");
for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(), E = CSI.end(); I != E; ++I) {
int64_t Offset = MFI.getObjectOffset(I->getFrameIdx()) - getOffsetOfLocalArea();
unsigned Reg = I->getReg();
for (auto I : CSI) {
int64_t Offset = MFI.getObjectOffset(I.getFrameIdx()) - getOffsetOfLocalArea();
unsigned Reg = I.getReg();
// Reg is in CPURegs.
DEBUG(dbgs() << Reg << "\n");
CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(FrameLabel, MRI->getDwarfRegNum(Reg, true), Offset));
Expand All @@ -153,15 +146,10 @@ void EpiphanyFrameLowering::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
MachineFrameInfo &MFI = MF.getFrameInfo();
EpiphanyMachineFunctionInfo *FI = MF.getInfo<EpiphanyMachineFunctionInfo>();

const EpiphanyInstrInfo &TII =
*static_cast<const EpiphanyInstrInfo *>(STI.getInstrInfo());
const EpiphanyRegisterInfo &RegInfo =
*static_cast<const EpiphanyRegisterInfo *>(STI.getRegisterInfo());
const EpiphanyInstrInfo &TII = *STI.getInstrInfo();

DebugLoc dl = MBBI->getDebugLoc();
EpiphanyABIInfo ABI = STI.getABI();
unsigned SP = Epiphany::SP;
unsigned LR = Epiphany::LR;
unsigned LDRi64 = Epiphany::LDRi64;
Expand Down Expand Up @@ -195,7 +183,7 @@ int EpiphanyFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI, unsigned &FrameReg) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
if (hasFP(MF)) {
const EpiphanyRegisterInfo *RegInfo = static_cast<const EpiphanyRegisterInfo *>(
const auto *RegInfo = static_cast<const EpiphanyRegisterInfo *>(
MF.getSubtarget().getRegisterInfo());
FrameReg = RegInfo->getFrameRegister(MF);
//return MFI.getObjectOffset(FI) + 16;
Expand All @@ -220,8 +208,7 @@ void EpiphanyFrameLowering::determineCalleeSaves(MachineFunction &MF,
RegScavenger *RS) const {
//@determineCalleeSaves-body
TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
EpiphanyMachineFunctionInfo *FI = MF.getInfo<EpiphanyMachineFunctionInfo>();
const EpiphanyRegisterInfo *RegInfo = static_cast<const EpiphanyRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
const auto *RegInfo = static_cast<const EpiphanyRegisterInfo *>(MF.getSubtarget().getRegisterInfo());

DEBUG(dbgs() << "*** determineCalleeSaves\nUsed CSRs:";
for (int Reg = SavedRegs.find_first(); Reg != -1;
Expand Down Expand Up @@ -284,7 +271,7 @@ bool EpiphanyFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
unsigned StackAlign = getStackAlignment();

// Check if this index can be paired
unsigned suba, subb, frameidx, sra = 0, srb = 0;
unsigned suba, subb, sra = 0, srb = 0;
if(!Pair && (i+1 < CSI.size())) {
suba = CSI[i].getReg();
subb = CSI[i+1].getReg();
Expand Down Expand Up @@ -313,7 +300,7 @@ bool EpiphanyFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
// Swap indexes for paires
if (Pair && PrevFrameIdx != -1) {
// Create two local frame objects aligned to dword
bool StackGrowsDown = getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown ? true : false;
bool StackGrowsDown = getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
int64_t LocalFrameSize = (MFI.getLocalFrameSize() + 0x7) & ~0x7;
LocalFrameSize = StackGrowsDown ? -LocalFrameSize : LocalFrameSize;
LocalFrameSize += StackGrowsDown ? -4 : 4;
Expand Down Expand Up @@ -346,7 +333,6 @@ bool EpiphanyFrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const {
MachineFunction *MF = MBB.getParent();
const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
MachineFrameInfo &MFI = MF->getFrameInfo();

// Debug output
DebugLoc DL;
Expand All @@ -372,7 +358,6 @@ bool EpiphanyFrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,

// Try to pair the spill
bool Pair = false;
bool stepForward = true;
unsigned suba, subb, frameidx, sra = 0, srb = 0;
if(i+1 < CSI.size()){
suba = CSI[i].getReg();
Expand Down Expand Up @@ -412,7 +397,6 @@ bool EpiphanyFrameLowering::hasFP(const MachineFunction &MF) const {
const TargetRegisterInfo *TRI = STI.getRegisterInfo();

DEBUG(
const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
if (MF.getTarget().Options.DisableFramePointerElim(MF)) {
dbgs() << "\nHas FP: DisableFramePointerElim set\n";
}
Expand All @@ -424,7 +408,7 @@ bool EpiphanyFrameLowering::hasFP(const MachineFunction &MF) const {
}
if (MFI.isFrameAddressTaken()) {
dbgs() << "\nHas FP: Frame address taken\n";
});
};);

return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
TRI->needsStackRealignment(MF) ||
Expand Down
2 changes: 0 additions & 2 deletions EpiphanyISelDAGToDAG.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -131,8 +131,6 @@ bool EpiphanyDAGToDAGISel::trySelect(SDNode *Node) {
// Instruction Selection not handled by the auto-generated
// tablegen selection should be handled here.
///
EVT NodeTy = Node->getValueType(0);
unsigned MultOpc;

switch(Opcode) {
default: break;
Expand Down
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