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stm32h5 run application in external flash memory XIP #88579
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west build -b stm32h573i_dk samples/application_development/code_relocation_nocopy/
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with a special sample dedicated to st boards for XiP requires mcu-tools/mcuboot#2154
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Define larger partition in the external NOR flash (consequently adjusting the SECTOR size for the mcu boot) |
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CI failure "invalid length for memory region EXTFLASH" given by the samples/application_development/code_relocation_nocopy/linker_arm_nocopy.ld map giving : EXTFLASH 0x0000000090000000 0xffffffffffffffff xr Build operation displays wrong extflash too:
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when It looks like the DT_INST_REG_SIZE does not exist for the st,stm32-xspi-nor compat (DT_INST_REG_ADDR exists) --> see issue #88404 |
See #88392 for a fix. |
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set the DNM mabel until the #88646 is merged |
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Adding the commit to retrieve the CONFIG_FLASH_BASE_ADDRESS from the DTS by the soc/st/stm32/Kconfig.defconfig |
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set the DNM mabel until the #88051 is merged |
This commit is retrieving the config FLASH_BASE_ADDRESS from the XSPI node of the stm32 device dtsi <reg> property of the "st,stm32-xspi" node. For example the CONFIG_FLASH_BASE_ADDRESS is 0x90000000 and application is linked for that address. Size is given by the size property of the "st,stm32-xspi-nor" node. Signed-off-by: Francois Ramu <[email protected]>
Add the clock domain configuration for the xspi nodes Where the DTS defines main clock and peripheral clock sel plus a XSPIM clock Signed-off-by: Francois Ramu <[email protected]>
Add the support of the stm32h7rs serie to the drivers/flash/flash_stm32_xspi driver. The stm32h7rs has no delayblock Signed-off-by: Francois Ramu <[email protected]>
Add the definitions of the PLL2 and PLL3 outputs for the stm32H7RS mcus and the HCLK5 which is clock source for the XSPI instance. Signed-off-by: Francois Ramu <[email protected]>
Defines the the xspi peripheral of the stm32h7rs serie Requires the corresponding memory area of the MPU. Signed-off-by: Francois Ramu <[email protected]>
Add the XSPI 2 which is an octoSPI connection to a octo NOR flash MX25UW25645GXDI00 (256 Mbits, 1.8 V, 200 MHz, DTR, rww) on the nucleo_h7s3l8 board. Signed-off-by: Francois Ramu <[email protected]>
Add the XSPI 2 which is an octoSPI connection to a octo NOR flash mx66uw1g45 on the stm32h7s78_dk disco kit Signed-off-by: Francois Ramu <[email protected]>
Do not disable the pll clock if it source the xspi and if the external flash is executing in Place. On mcuboot reset, the code is executed on the external flash through the xspi. It must not disable its own clock source. Signed-off-by: Francois Ramu <[email protected]>
Adding the configuration to run
west flash is possible if the stm32cubeprogrammer runner selects the external loader with the following condition CONFIG_XIP AND CONFIG_BOOTLOADER_MCUBOOT
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Add the XSPI 2 which is an octoSPI connection to a octo NOR flash mx25lm51245 on the stm32h573i_dk disco kit Define the partition on the 64MBytes space of the external flash Use the STM32Cube programmer to flash with the corresponding external loader for XiP mode. Removing usb_device will avoid test feature for that board. Signed-off-by: Francois Ramu <[email protected]>
Run the sample to execute in place on the external flash of the stm32h573 disco kit. with_boot is build and linked for the external flash Download the mcuboot zephyr.bin in internal memory Download the with_mcuboot zephyr.signed.bin in external memory Signed-off-by: Francois Ramu <[email protected]>
the stm32h5 disco kit board can run an application in external flash
Requires the #88646 which removes the warning in the DTC
With this PR it enable the memorymapped mode on the external flash memory so that XIP is possible on the external NOR octoflash
Two samples are running in XIP on the external flash
samples/application_development/code_relocation_nocopy/
samples/boards/st/hello_world_xip/ built with mcu boot mcu-tools/mcuboot#2154
Fixes #87531
This PR completes the #88051 for the stm32h5 serie