feat: consolidate Agentic Circuit into pyCircuit 6 - #4
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added 30 commits
August 6, 2026 00:54
… and integration scenarios
Several negative splits in test/ACSim/ops-invalid.mlir and test/ACIR/trace-invalid.mlir were unreachable as written: model- and process-level verification runs before op-level checks, so the expected op-level diagnostics were masked by earlier structural errors. - live-load/live-store: give the model a canonical construction order so the exact-typed-slot resolution check is reached; expect the resolution diagnostic that actually guards the contract. - invoke-type: add a resolvable implementation callee, canonical construction order, and a sufficient fairness cap so the invoke result-type verifier is reached. - dispatch-negative: define the root module so dispatch object-ID resolution is checked; expect the resolution diagnostic. - continue-missing / activate-types: match the actual parser diagnostics for a missing continue target and reversed activate types. - trace decode-not-in-process: expect the structural Graph-region legality diagnostic, which is the check that enforces process-only placement for executable trace operations.
Parked work-in-progress from an interrupted Task 12 session. Includes compile fixes for the acsim.instance/acsim.array builder calls (result type first, StringRef/ArrayRef arguments). Known gaps before this can land on the phase branch: - pass aborts at runtime: ACSim dialect is not loaded by the pass (missing getDependentDialects / context load) - the four Conversion lit tests were written against an outdated ac.module syntax and do not parse - fingerprints are zero placeholders; type/interface derivation is a stub; no binding-lock integration, object IDs, or activation adjacency - no rejection of unfrozen or unresolved ACIR input
The scaffold commit registered createConvertACIRToACSimPass in the driver but did not link the ACIRToACSim library, so acir-opt and acir-opt-internal failed to link at the branch tip.
The scaffolded ConvertACIRToACSim placeholder did not override getArgument(), so every driver run aborted in pass registration once the library was linked. Give the placeholder a proper argument/description and repair the scaffold lit test: the input used pre-review module syntax that no longer parses, and a documentary 'after implementation' line was an executable RUN directive that could never pass.
# Conflicts: # lib/Conversion/ACIRToACSim/ACIRToACSim.cpp # test/Conversion/structure.mlir
Replace the staged convert-acir-to-acsim conversion with a single atomic whole-model pass, ac-lower-to-acsim. The pass validates every precondition (epoch, topology freeze, one selected system, '() -> ()' signatures, placement/static-parameter exactness, canonical module ordering, and yield-only process bodies), plans construction/destruction order, runtime rows, dispatch thunks, and activation edges, then publishes exactly one verified acsim.model with real sha256 fingerprints. Any rejection is diagnosed with a spec ACLOWER-* code before any IR is emitted; the output file stays empty on failure. Stage-boundary constructs that have no ACSim v0.1 realization (queues, resources, address maps, time domains, views, instrumentation, heterogeneous instance collections, generator modules, and non-yield process bodies) are rejected with ACLOWER-UNSUPPORTED-CONSTRUCT or the precise ACLOWER-* precondition code; they are never silently dropped. The acir-opt driver gains --ac-lower-to-acsim with the exact binding profile/target requirements, and the trailing whole-model ACIR gate is skipped only for the atomic lowering path. Tests cover structure, hierarchy, placement collections, stateful binding locks, yield-only process lowering, process-body rejection, and atomic failure modes including unfrozen input and orphaned driver options.
…n unit tests - test/Conversion/bindings-invalid.mlir: ownership, sort-order, array, stage-boundary, registry, and metadata rejections with exact ACLOWER-* diagnostic codes, driven by new registry fixtures - unittests/Conversion: ACIRToACSimTests covering the public conversion API - Expand ACIR/ACSim invalid lit coverage for contracts, trace, types, and ops - Expose binding-registry validation hooks in ACIRToACSim.h; harden ACSimOps.cpp verifier diagnostics - requirements-dev.lock: add pyyaml and clang-format for coverage gates
- scripts/check-ir-coverage.py: read-only gate requiring the ODS surface to exactly match the normative contracts/*.yaml manifests, positive and negative lit coverage for every public op/type, dialect registration tables, and a current generated ledger; rejects implementation-only aliases and stale epoch entries - tests/contracts/test_ir_coverage.py: contract coverage with red fixtures for missing/extra surface entries, stale epochs, coverage gaps, registration drift, and stale ledgers - docs/implementation/spec-coverage.md: generated coverage ledger - test/ACSim/ops-invalid.mlir: close the acsim.port negative coverage gap - CMake: install/export ACIRDialect, ACSimDialect, ACIRBindings, and ACIRAnalysis with INSTALL_INTERFACE includes and public headers - tests/install-consumer: installed-tree ProcessStatePlan consumer that configures against the installed package with no source-tree paths - .clang-format + normalized owned sources; .clang-tidy gate (clang-analyzer + curated bugprone/performance checks, Werror) with violations fixed across lib, tools, and unittests - CI: coverage gate, clang-format, Debug-assertions build + lit/FileCheck + unit tests, clang-tidy, Release build + suites, and the clean-install consumer build
Phase 1 audit found ACIRResources enforced the 256-relation general mixed-interleave bound without an observed negative test; add a 33-entry mixed-geometry address map that crosses it.
- add docs/implementation/phase-1-audit.md with results for all seven audit steps, including the rule-to-negative-test mapping, the structural fan-in note, and the 256-relation limit test reference - record the reviewed commit range in the generated spec coverage ledger via docs/implementation/reviewed-commits.txt - keep scripts/audit5-determinism.sh as reproducible determinism evidence (5 iterations x 11 inputs; text, bytecode, and topology digests stable)
PlacementPlan carries seven std::strings plus attributes; on libstdc++ sizeof(PlacementPlan) is 296, which trips LLVM's default inline-element static assertion (sizeof(T) <= 256) when building with GCC on Linux. The macOS libc++ build stayed under the threshold, so this only surfaced in CI. Give both SmallVector<PlacementPlan> sites an explicit inline count of 0, matching the existing ModulePlan and MapEntry convention.
CI builds LLVM 22.1.8 from source with default flags (no RTTI), while the reference Homebrew LLVM has RTTI on. Our MLIR-facing targets subclass mlir::Dialect, mlir::Pass, llvm::cl::Option, and friends; compiled with RTTI on, their vtables reference typeinfo symbols that no-RTTI LLVM libraries never export, so every tool and unit-test link failed on Linux CI. Scope -fno-rtti to the MLIR-facing directories when the linked LLVM build has RTTI disabled; lib/gfsim and unittests/gfsim keep RTTI for their dynamic_cast tree walks. Verified locally by syntax-compiling all 52 MLIR-facing TUs with -fno-rtti.
ci-build-llvm.sh only built mlir-opt, so the cached .cache/llvm-build had no FileCheck, not, split-file, or count binaries. Every lit substitution (%FileCheck, %split_file, %not) pointed at a missing executable and all 67 tests failed within a fraction of a second on Linux CI, while macOS development used the full Homebrew LLVM tools and stayed green. Build the four test tools alongside mlir-opt and assert their presence in the verify step. The cache key covers this script, so this run rebuilds LLVM once; subsequent runs reuse the complete cached outputs.
add_lit_testsuite runs lit in succinct mode, which lists failed tests but hides their command output. CI is the only Linux/no-RTTI environment this project has; its logs need the failure bodies to diagnose platform-specific regressions like the Conversion/hierarchy.mlir miss.
feat: add ACIR to PYC-compatible Verilog backend
fix: refresh phase5 NPU schema fingerprints
Adopt release-neutral repository layout
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Closure update ( Passed:
Open blocker:
Evidence: Decision 0150 remains |
added 9 commits
August 31, 2026 21:42
This reverts commit d546b8c.
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marked this pull request as ready for review
August 31, 2026 15:23
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Outcome
Consolidate
PTO-ISA/agentic-circuitinto the canonical pyCircuit 6 repository while preserving ACIR, theagentic_circuitfrontend, ACPy 0.3, ACSim/gfsim, and the Cycle-Aware Signal/PYC semantic boundary.Decisions
pycircuitandagentic_circuitremain separate Python distributions and namespaces.pycc, andlibpyc6_runtime.History and collaboration
756002e2998b11dfe1fed14dc3d63cdad8be694cagentic-circuit/import-0.3agentic-circuit/pr-18-headandagentic-circuit/pr-23-head.Validation completed so far
This remains draft until AC G0/G1/G2, the full pyCircuit 6 closure, Linx integration gates, PR/issue migration, and Decision 0150 evidence are complete.