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arc: emit clobber of CC for -mcpu=em x >> 31 #186

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arc: emit clobber of CC for -mcpu=em x >> 31 #186

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60 changes: 35 additions & 25 deletions gcc/config/arc/arc.md
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Original file line number Diff line number Diff line change
Expand Up @@ -3554,7 +3554,14 @@ archs4x, archs4xd"
[(set (match_operand:SI 0 "dest_reg_operand" "")
(ANY_SHIFT_ROTATE:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "nonmemory_operand" "")))]
"")
""
{
if (!TARGET_BARREL_SHIFTER && operands[2] != const1_rtx)
{
emit_insn (gen_<insn>si3_loop (operands[0], operands[1], operands[2]));
DONE;
}
})

; asl, asr, lsr patterns:
; There is no point in including an 'I' alternative since only the lowest 5
Expand Down Expand Up @@ -3653,35 +3660,23 @@ archs4x, archs4xd"
[(set_attr "type" "shift")
(set_attr "length" "8")])

(define_insn_and_split "*<insn>si3_nobs"
[(set (match_operand:SI 0 "dest_reg_operand")
(ANY_SHIFT_ROTATE:SI (match_operand:SI 1 "register_operand")
(match_operand:SI 2 "nonmemory_operand")))]
(define_insn_and_split "<insn>si3_loop"
[(set (match_operand:SI 0 "dest_reg_operand" "=r,r")
(ANY_SHIFT_ROTATE:SI (match_operand:SI 1 "register_operand" "0,0")
(match_operand:SI 2 "nonmemory_operand" "rn,Cal")))
(clobber (reg:SI LP_COUNT))
(clobber (reg:CC CC_REG))]
"!TARGET_BARREL_SHIFTER
&& operands[2] != const1_rtx
&& arc_pre_reload_split ()"
"#"
"&& 1"
&& operands[2] != const1_rtx"
"* return output_shift_loop (<CODE>, operands);"
"&& arc_pre_reload_split ()"
[(const_int 0)]
{
arc_split_<insn> (operands);
DONE;
})

;; <ANY_SHIFT_ROTATE>si3_loop appears after <ANY_SHIFT_ROTATE>si3_nobs
(define_insn "<insn>si3_loop"
[(set (match_operand:SI 0 "dest_reg_operand" "=r,r")
(ANY_SHIFT_ROTATE:SI
(match_operand:SI 1 "register_operand" "0,0")
(match_operand:SI 2 "nonmemory_operand" "rn,Cal")))
(clobber (reg:SI LP_COUNT))
(clobber (reg:CC CC_REG))
]
"!TARGET_BARREL_SHIFTER
&& operands[2] != const1_rtx"
"* return output_shift_loop (<CODE>, operands);"
[(set_attr "type" "shift")
(set_attr "length" "16,20")])
}
[(set_attr "type" "shift")
(set_attr "length" "16,20")])

;; DImode shifts

Expand Down Expand Up @@ -6412,6 +6407,21 @@ archs4x, archs4xd"
[(set_attr "type" "unary")
(set_attr "length" "4")
(set_attr "predicable" "no")])

;; Match <insn>si3_loop pattern if operand 2 has become const_int 1 in the meantime
(define_insn_and_split "<insn>si3_cnt1_clobber"
[(set (match_operand:SI 0 "dest_reg_operand")
(ANY_SHIFT_ROTATE:SI (match_operand:SI 1 "register_operand")
(const_int 1)))
(clobber (reg:SI LP_COUNT))
(clobber (reg:CC CC_REG))]
"!TARGET_BARREL_SHIFTER"
"#"
"&& arc_pre_reload_split ()"
[(set (match_dup 0) (ANY_SHIFT_ROTATE:SI (match_dup 1) (const_int 1)))]
""
[(set_attr "type" "shift")
(set_attr "length" "4")])

(define_peephole2
[(set (match_operand:SI 0 "register_operand" "")
Expand Down
19 changes: 19 additions & 0 deletions gcc/testsuite/gcc.target/arc/no-barrel-shifter.c
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Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
/* { dg-do compile } */
/* { dg-options "-O2" } */
/* { dg-skip-if "" { { barrelshifter } } } */
int fromfloat(float fx);

float foo(float fx)
{
int x = fromfloat(fx);
int sign = (x >> 31) & 1;
unsigned int mag = x & 0x7fffffff;

if (mag > 0x7f800000)
return fx;
if (mag == 0x7f800000)
return (sign == 0);
return fx * (27 + sign);
}

/* { dg-final { scan-assembler-not "add.f\\s\+\[0-9\]\+,r\[0-9\]\+,r\[0-9\]\+\\n\\s\+beq.d" } } */