Search results

fix(file format): ensure files end with newline.

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 154457

#154457 In llvm/llvm-project;

· link-xyq opened on Aug 20, 2025

[RISCV] Reduce code duplication in RISCVMoveMerge::findMatchingInst. NFCI

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 154451

#154451 In llvm/llvm-project;

· topperc opened on Aug 20, 2025

[RISCV] Use slideup to lower build_vector when its last operand is a reduction

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 154450

#154450 In llvm/llvm-project;

· mshockwave opened on Aug 20, 2025

[libc][math][c++23] Add {frexp,ilogb,ldexp,llogb,logb}bf16 math functions

backend:AMDGPU

backend:RISC-V

libc

Status: Open (in progress).

llvm/llvm-projectnumber 154427

#154427 In llvm/llvm-project;

· krishna2803 opened on Aug 19, 2025

[clang] Regenerate test checks including TBAA semantics (NFC)

backend:AMDGPU

backend:PowerPC

backend:RISC-V

backend:SystemZ

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:openmpOpenMP related changes to ClangOpenMP related changes to Clang

testing-tools

Status: Open (in progress).

llvm/llvm-projectnumber 154347

#154347 In llvm/llvm-project;

· antoniofrighetto opened on Aug 19, 2025

RISC-V error "system register use requires an option to be enabled" is incredibly vague

backend:RISC-V

Status: Open.

#154318 In llvm/llvm-project;

· Timmmm opened on Aug 19, 2025

[RISCV] Early exit if the type legalization cost is not valid for getIntrinsicInstrCost

backend:RISC-V

llvm:analysisIncludes value tracking, cost tables and constant foldingIncludes value tracking, cost tables and constant folding

Status: Open (in progress).

llvm/llvm-projectnumber 154256

#154256 In llvm/llvm-project;

· tclin914 opened on Aug 19, 2025

[RISCV] Unaligned vec mem => prefer alt opc vec

backend:RISC-V

llvm:transforms

Status: Open (in progress).

llvm/llvm-projectnumber 154153

#154153 In llvm/llvm-project;

· mgudim opened on Aug 18, 2025

[RISCV] Add changes to have better coverage for qc.insb and qc.insbi

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 154135

#154135 In llvm/llvm-project;

· hchandel opened on Aug 18, 2025

[riscv64] [LoopVectorize] Assertion Failure in computeBestVF with VPlan Cost Model

backend:RISC-V

crashPrefer [crash-on-valid] or [crash-on-invalid]Prefer [crash-on-valid] or [crash-on-invalid]

vectorizers

Status: Open.

Bug

#154103 In llvm/llvm-project;

· whileone-sk opened on Aug 18, 2025

[VPlan] Use VP intrinsics for trapping divisors with EVL tail folding

backend:RISC-V

llvm:transforms

vectorizers

Status: Open (in progress).

llvm/llvm-projectnumber 154076

#154076 In llvm/llvm-project;

· lukel97 opened on Aug 18, 2025

[LV][EVL] Replace VPInstruction::Select with vp.merge for predicated div/rem

backend:RISC-V

llvm:transforms

vectorizers

Status: Open (in progress).

llvm/llvm-projectnumber 154072

#154072 In llvm/llvm-project;

· Mel-Chen opened on Aug 18, 2025