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[AMDGPU] Only run AMDGPUPrintfRuntimeBindingPass at non-prelink phase #125162

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The pass is registered in a pipeline that will run at none LTO, LTO prelink, as
well as LTO postlink phase. It uses the current number of metadata operands as
unique id for printf handling. However, if two TUs both have printf, their
unique id will be starting with 1. After they are linked together, the id is no
longer unique anymore. To resolve this issue, the pass should not run at LTO pre
link stage.

The pass is registered in a pipeline that will run at none LTO, LTO prelink, as
well as LTO postlink phase. It uses the _current_ number of metadata operands as
unique id for printf handling. However, if two TUs both have `printf`, their
unique id will be starting with 1. After they are linked together, the id is no
longer unique anymore. To resolve this issue, the pass should not run at LTO pre
link stage.
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llvmbot commented Jan 31, 2025

@llvm/pr-subscribers-backend-amdgpu

Author: Shilei Tian (shiltian)

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The pass is registered in a pipeline that will run at none LTO, LTO prelink, as
well as LTO postlink phase. It uses the current number of metadata operands as
unique id for printf handling. However, if two TUs both have printf, their
unique id will be starting with 1. After they are linked together, the id is no
longer unique anymore. To resolve this issue, the pass should not run at LTO pre
link stage.


Full diff: https://github.com/llvm/llvm-project/pull/125162.diff

2 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (+2-1)
  • (modified) llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll (+1)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 96062b30fc0127a..3f90e05ce83babb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -791,7 +791,8 @@ void AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
   PB.registerPipelineEarlySimplificationEPCallback(
       [](ModulePassManager &PM, OptimizationLevel Level,
          ThinOrFullLTOPhase Phase) {
-        PM.addPass(AMDGPUPrintfRuntimeBindingPass());
+        if (!isLTOPreLink(Phase))
+          PM.addPass(AMDGPUPrintfRuntimeBindingPass());
 
         if (Level == OptimizationLevel::O0)
           return;
diff --git a/llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll b/llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
index c68143f44866f34..b1fc76f457ece26 100644
--- a/llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
+++ b/llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
@@ -14,6 +14,7 @@
 
 ; PRE-NOT: internalize
 ; PRE-NOT: amdgpu-attributor
+; PRE-NOT: printfToRuntime
 
 define amdgpu_kernel void @kernel() {
 entry:

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