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[llvm][gvn-sink] Don't try to sink inline asm #138414

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Merged
merged 1 commit into from
May 6, 2025
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[llvm][gvn-sink] Don't try to sink inline asm #138414

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3 changes: 2 additions & 1 deletion llvm/lib/Transforms/Utils/Local.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4220,8 +4220,9 @@ bool llvm::canReplaceOperandWithVariable(const Instruction *I, unsigned OpIdx) {
return false;

// Early exit.
if (!isa<Constant>(I->getOperand(OpIdx)))
if (!isa<Constant, InlineAsm>(I->getOperand(OpIdx))) {
return true;
}

switch (I->getOpcode()) {
default:
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46 changes: 46 additions & 0 deletions llvm/test/Transforms/GVNSink/pr138345.ll
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@@ -0,0 +1,46 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -passes="gvn-sink" -S %s | FileCheck %s

;; See https://github.com/llvm/llvm-project/issues/138345 for details.
;; The program below used to crash due to taking the address of the inline asm.
;; gvn-sink shouldn't do anything in this case, so test that the pass no longer
;; generates invalid IR and no longer crashes.

define void @c(i64 %num, ptr %ptr) {
; CHECK-LABEL: define void @c(
; CHECK-SAME: i64 [[NUM:%.*]], ptr [[PTR:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: switch i64 [[NUM]], label %[[SW_EPILOG:.*]] [
; CHECK-NEXT: i64 1, label %[[SW_BB:.*]]
; CHECK-NEXT: i64 0, label %[[SW_BB1:.*]]
; CHECK-NEXT: ]
; CHECK: [[SW_BB]]:
; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[PTR]], align 1
; CHECK-NEXT: call void asm sideeffect "", "r,r,~{dirflag},~{fpsr},~{flags}"(i8 [[TMP1]], ptr @c)
; CHECK-NEXT: br label %[[SW_EPILOG]]
; CHECK: [[SW_BB1]]:
; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[PTR]], align 1
; CHECK-NEXT: call void asm sideeffect "movdqu 0 [[XMM0:%.*]] \0A\09", "r,r,~{dirflag},~{fpsr},~{flags}"(i8 [[TMP2]], ptr @c)
; CHECK-NEXT: br label %[[SW_EPILOG]]
; CHECK: [[SW_EPILOG]]:
; CHECK-NEXT: ret void
;
entry:
switch i64 %num, label %sw.epilog [
i64 1, label %sw.bb
i64 0, label %sw.bb1
]

sw.bb: ; preds = %entry
%1 = load i8, ptr %ptr, align 1
call void asm sideeffect "", "r,r,~{dirflag},~{fpsr},~{flags}"(i8 %1, ptr @c)
br label %sw.epilog

sw.bb1: ; preds = %entry
%2 = load i8, ptr %ptr, align 1
call void asm sideeffect "movdqu 0 %xmm0 \0A\09", "r,r,~{dirflag},~{fpsr},~{flags}"(i8 %2, ptr @c)
br label %sw.epilog

sw.epilog: ; preds = %sw.bb1, %sw.bb, %entry
ret void
}