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[RISCV] Fold LI 1 / SLLI into BSETI during i64 materialization #142348

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Merged
merged 1 commit into from
Jun 2, 2025
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[RISCV] Fold LI 1 / SLLI into BSETI during i64 materialization #142348

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7 changes: 7 additions & 0 deletions llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -353,6 +353,13 @@ InstSeq generateInstSeq(int64_t Val, const MCSubtargetInfo &STI) {
} while (Hi != 0);
Res = TmpSeq;
}

// Fold LI 1 + SLLI into BSETI.
if (Res[0].getOpcode() == RISCV::ADDI && Res[0].getImm() == 1 &&
Res[1].getOpcode() == RISCV::SLLI) {
Res.erase(Res.begin()); // Remove ADDI.
Res.front() = Inst(RISCV::BSETI, Res.front().getImm()); // Patch SLLI.
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Another option would be to add setOpcode().

}
}

// Perform optimization with BCLRI in the Zbs extension.
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6 changes: 2 additions & 4 deletions llvm/test/CodeGen/RISCV/imm.ll
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Expand Up @@ -4674,8 +4674,7 @@ define i64 @imm64_0xFFFFFFFF0() {
;
; RV64IZBS-LABEL: imm64_0xFFFFFFFF0:
; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: li a0, 1
; RV64IZBS-NEXT: slli a0, a0, 36
; RV64IZBS-NEXT: bseti a0, zero, 36
; RV64IZBS-NEXT: addi a0, a0, -16
; RV64IZBS-NEXT: ret
;
Expand Down Expand Up @@ -4737,8 +4736,7 @@ define i64 @imm64_0x1FFFFFF08() {
;
; RV64IZBS-LABEL: imm64_0x1FFFFFF08:
; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: li a0, 1
; RV64IZBS-NEXT: slli a0, a0, 33
; RV64IZBS-NEXT: bseti a0, zero, 33
; RV64IZBS-NEXT: addi a0, a0, -248
; RV64IZBS-NEXT: ret
;
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33 changes: 21 additions & 12 deletions llvm/test/CodeGen/RISCV/zbb-logic-neg-imm.ll
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Expand Up @@ -397,18 +397,27 @@ define i64 @and_or_or(i64 %x, i64 %y) {
; RV32-NEXT: and a1, a1, a3
; RV32-NEXT: ret
;
; RV64-LABEL: and_or_or:
; RV64: # %bb.0:
; RV64-NEXT: li a2, -1
; RV64-NEXT: slli a2, a2, 33
; RV64-NEXT: addi a2, a2, 1
; RV64-NEXT: or a0, a0, a2
; RV64-NEXT: li a2, 1
; RV64-NEXT: slli a2, a2, 33
; RV64-NEXT: addi a2, a2, -2
; RV64-NEXT: or a1, a1, a2
; RV64-NEXT: and a0, a0, a1
; RV64-NEXT: ret
; NOZBS64-LABEL: and_or_or:
; NOZBS64: # %bb.0:
; NOZBS64-NEXT: li a2, -1
; NOZBS64-NEXT: slli a2, a2, 33
; NOZBS64-NEXT: addi a2, a2, 1
; NOZBS64-NEXT: or a0, a0, a2
; NOZBS64-NEXT: li a2, 1
; NOZBS64-NEXT: slli a2, a2, 33
; NOZBS64-NEXT: addi a2, a2, -2
; NOZBS64-NEXT: or a1, a1, a2
; NOZBS64-NEXT: and a0, a0, a1
; NOZBS64-NEXT: ret
;
; ZBS64-LABEL: and_or_or:
; ZBS64: # %bb.0:
; ZBS64-NEXT: bseti a2, zero, 33
; ZBS64-NEXT: addi a2, a2, -2
; ZBS64-NEXT: orn a0, a0, a2
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Combines nicely with #120221. Found in https://github.com/dtcxzyw/llvm-codegen-benchmark/blob/aad2b0e07e06107067bab0a1b6aeaeef3897b95a/dataset/3decd43ca8a5d573.ll#L18

; ZBS64-NEXT: or a1, a1, a2
; ZBS64-NEXT: and a0, a0, a1
; ZBS64-NEXT: ret
%a = or i64 %x, -8589934591
%b = or i64 %y, 8589934590
%c = and i64 %a, %b
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