[ARM] support -mlong-calls -fPIC on arm32 #39970 #147313

jiangxuezhi · 2025-07-07T14:54:32Z

support -mlong-calls -fPIC on arm32
try fixing issuse #39970 and maybe helpful for soving the problem encourted in #142982

github-actions · 2025-07-07T14:54:49Z

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llvmbot · 2025-07-07T14:55:18Z

@llvm/pr-subscribers-backend-arm

Author: None (jiangxuezhi)

Changes

supoort -mlong-calls -fPIC using GOT
try fixing issuse #39970 and maybe helpful for soving the problem encourted in #142982

Full diff: https://github.com/llvm/llvm-project/pull/147313.diff

2 Files Affected:

(modified) llvm/lib/Target/ARM/ARMISelLowering.cpp (+12-4)
(added) llvm/test/CodeGen/ARM/long-calls.ll (+32)

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 2d73725291d11..b73a53cca84e3 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2815,13 +2815,20 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
   auto PtrVt = getPointerTy(DAG.getDataLayout());
 
   if (Subtarget->genLongCalls()) {
-    assert((!isPositionIndependent() || Subtarget->isTargetWindows()) &&
-           "long-calls codegen is not position independent!");
     // Handle a global address or an external symbol. If it's not one of
     // those, the target's already in a register, so we don't need to do
     // anything extra.
     if (isa<GlobalAddressSDNode>(Callee)) {
-      if (Subtarget->genExecuteOnly()) {
+      if (isPositionIndependent() && !Subtarget->isTargetWindows() &&
+          !Subtarget->genExecuteOnly()) {
+        SDValue G = DAG.getTargetGlobalAddress(
+            GVal, dl, PtrVt, 0, GVal->isDSOLocal() ? 0 : ARMII::MO_GOT);
+        Callee = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVt, G);
+        if (!GVal->isDSOLocal())
+          Callee =
+              DAG.getLoad(PtrVt, dl, DAG.getEntryNode(), Callee,
+                          MachinePointerInfo::getGOT(DAG.getMachineFunction()));
+      } else if (Subtarget->genExecuteOnly()) {
         if (Subtarget->useMovt())
           ++NumMovwMovt;
         Callee = DAG.getNode(ARMISD::Wrapper, dl, PtrVt,
@@ -2839,7 +2846,8 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
             PtrVt, dl, DAG.getEntryNode(), Addr,
             MachinePointerInfo::getConstantPool(DAG.getMachineFunction()));
       }
-    } else if (ExternalSymbolSDNode *S=dyn_cast<ExternalSymbolSDNode>(Callee)) {
+    } else if (ExternalSymbolSDNode *S =
+                   dyn_cast<ExternalSymbolSDNode>(Callee)) {
       const char *Sym = S->getSymbol();
 
       if (Subtarget->genExecuteOnly()) {
diff --git a/llvm/test/CodeGen/ARM/long-calls.ll b/llvm/test/CodeGen/ARM/long-calls.ll
new file mode 100644
index 0000000000000..41763801fddd2
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/long-calls.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=armv7-unknown-linux-gnueabi -relocation-model pic -mattr=+long-calls -o - %s \
+; RUN:    | FileCheck %s
+
+@msg = private unnamed_addr constant [12 x i8] c"hello world\00", align 1
+
+declare i32 @puts(ptr)
+
+define void @test() {
+; CHECK-LABEL: test:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    .save {r11, lr}
+; CHECK-NEXT:    push {r11, lr}
+; CHECK-NEXT:    ldr r0, .LCPI0_0
+; CHECK-NEXT:    ldr r1, .LCPI0_1
+; CHECK-NEXT:  .LPC0_0:
+; CHECK-NEXT:    add r0, pc, r0
+; CHECK-NEXT:  .LPC0_1:
+; CHECK-NEXT:    ldr r1, [pc, r1]
+; CHECK-NEXT:    blx r1
+; CHECK-NEXT:    pop {r11, pc}
+; CHECK-NEXT:    .p2align 2
+; CHECK-NEXT:  @ %bb.1:
+; CHECK-NEXT:  .LCPI0_0:
+; CHECK-NEXT:    .long .Lmsg-(.LPC0_0+8)
+; CHECK-NEXT:  .LCPI0_1:
+; CHECK-NEXT:  .Ltmp0:
+; CHECK-NEXT:    .long puts(GOT_PREL)-(.LPC0_1+8-.Ltmp0)
+entry:
+  %call = call i32 @puts(ptr @msg)
+  ret void
+}

jiangxuezhi · 2025-07-07T15:07:05Z

e.g.
the command is clang -O2 -mlong-calls -fPIC

the code is:
#include <stdio.h>

int main()
{
printf("hello");
return 0;
}

the Relocation section is:
Offset Info Type Sym. Value Symbol's Name
00000020 00000503 R_ARM_REL32 00000000 .L.str
00000024 00000760 R_ARM_GOT_PREL 00000000 printf

Relocation section '.rel.ARM.exidx' at offset 0x1a8 contains 1 entry:
Offset Info Type Sym. Value Symbol's Name
00000000 0000022a R_ARM_PREL31 00000000 .text

efriedma-quic · 2025-07-07T22:39:37Z

llvm/test/CodeGen/ARM/long-calls.ll

@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=armv7-unknown-linux-gnueabi -relocation-model pic -mattr=+long-calls -o - %s \
+; RUN:    | FileCheck %s


Can this be integrated into llvm/test/CodeGen/ARM/subtarget-features-long-calls.ll?

Thank you for the suggestion. I have moved the new test case to llvm/test/CodeGen/ARM/subtarget-features-long-calls.ll.

efriedma-quic · 2025-07-07T22:47:08Z

llvm/lib/Target/ARM/ARMISelLowering.cpp

+          Callee =
+              DAG.getLoad(PtrVt, dl, DAG.getEntryNode(), Callee,
+                          MachinePointerInfo::getGOT(DAG.getMachineFunction()));
+      } else if (Subtarget->genExecuteOnly()) {


Does the execute-only codepath work correctly with PIC?

Thank you for the reminder. Considering that XOM is a security feature which prevents the creation of constant pools in executable memory and load from memory, referring to this commit: 52a7dd7 and https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/what-is-execute-only-memory-xom, it makes sense to first check Subtarget->genExecuteOnly() before evaluating isPositionIndependent().
I have updated the code accordingly. Thanks again for your feedback.

efriedma-quic · 2025-07-07T22:49:54Z

llvm/lib/Target/ARM/ARMISelLowering.cpp

@@ -2839,7 +2846,8 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
            PtrVt, dl, DAG.getEntryNode(), Addr,
            MachinePointerInfo::getConstantPool(DAG.getMachineFunction()));
      }
-    } else if (ExternalSymbolSDNode *S=dyn_cast<ExternalSymbolSDNode>(Callee)) {
+    } else if (ExternalSymbolSDNode *S =
+                   dyn_cast<ExternalSymbolSDNode>(Callee)) {
      const char *Sym = S->getSymbol();

      if (Subtarget->genExecuteOnly()) {


Does the external-symbol codepath work correctly with PIC? (I think you can trigger this with llvm.memset or something like that.)

Thank you for your suggestion. I have attempted to make the external-symbol code path work with PIC.

During this process, I found that using ARMISD::WrapperPIC caused issues in generating correct SDValues for certain symbols. For example, the following error was triggered:

LLVM ERROR: Cannot select: t20: i32 = ARMISD::WrapperPIC TargetExternalSymbol:i32 'memset' [TF=8]

This suggests that using the GOT-based approach for PIC is not suitable in this case.

To address this, I instead used the ARMISD::PIC_ADD node to compute PC-relative addresses, which allows proper handling of external symbols under PIC.

In addition, I have added test cases for llvm.memset in:

llvm-project/llvm/test/CodeGen/ARM/subtarget-features-long-calls.ll

Please help review this change — I'd appreciate your feedback on whether this implementation is appropriate.

efriedma-quic · 2025-07-13T23:09:41Z

llvm/test/CodeGen/ARM/subtarget-features-long-calls.ll

@@ -4,6 +4,9 @@
 ; RUN: llc -mtriple=thumb-- -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 | FileCheck -check-prefix=NO-OPTION %s
 ; RUN: llc -mtriple=thumb-- -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=+long-calls | FileCheck -check-prefix=LONGCALL %s
 ; RUN: llc -mtriple=thumb-- -mcpu=cortex-a8 -relocation-model=static %s -o - -O0 -mattr=-long-calls | FileCheck -check-prefix=NO-LONGCALL %s
+; RUN: llc -mtriple=arm-linux-gnueabi -mcpu=cortex-a8 -relocation-model=pic %s -o - -O0 -mattr=+long-calls | FileCheck -check-prefix=PIC-O0-LONGCALL %s
+; RUN: llc -mtriple=arm-linux-gnueabi -mcpu=cortex-a8 -relocation-model=pic %s -o - -O1 -mattr=+long-calls | FileCheck -check-prefix=PIC-LONGCALL %s
+; RUN: llc -mtriple=arm-linux-gnueabi -mcpu=cortex-a8 -relocation-model=pic %s -o - -O2 -mattr=+long-calls | FileCheck -check-prefix=PIC-LONGCALL %s


You don't need both -O1 and -O2; -O0 is special in this context because it triggers globalisel/fastisel.

Please add RUN lines for execute-only, so we can see they work.

Please regenerate the CHECK lines with update_llc_test_checks.py, so it's easier to read/update.

efriedma-quic · 2025-07-13T23:34:07Z

llvm/test/CodeGen/ARM/subtarget-features-long-calls.ll

+; PIC-LONGCALL-LABEL: test_memset:
+; PIC-LONGCALL:       push {r11, lr}
+; PIC-LONGCALL:       ldr r3, [[MEMSET_LABEL:.*]]
+; PIC-LONGCALL:       add r3, pc, r3


The -O1 code is wrong. The -O0 code is also wrong.

Look at what we do for something like extern int x; int* f() { return &x; }. Or look at what we do for __attribute((visibility("hidden"))) extern int x; int* f() { return &x; }.

github-actions · 2025-07-13T23:38:08Z

⚠️ C/C++ code formatter, clang-format found issues in your code. ⚠️

You can test this locally with the following command:

git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/ARM/ARMISelLowering.cpp

View the diff from clang-format here.

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 242bec273..6d3192dff 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2802,9 +2802,9 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
           ++NumMovwMovt;
         Callee = DAG.getNode(ARMISD::Wrapper, dl, PtrVt,
                              DAG.getTargetGlobalAddress(GVal, dl, PtrVt));
-      } else if (isPositionIndependent() && !Subtarget->isTargetWindows()){
+      } else if (isPositionIndependent() && !Subtarget->isTargetWindows()) {
         SDValue G = DAG.getTargetGlobalAddress(
-              GVal, dl, PtrVt, 0, GVal->isDSOLocal() ? 0 : ARMII::MO_GOT);
+            GVal, dl, PtrVt, 0, GVal->isDSOLocal() ? 0 : ARMII::MO_GOT);
         Callee = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVt, G);
         if (!GVal->isDSOLocal())
           Callee =

llvmbot added the backend:ARM label Jul 7, 2025

jiangxuezhi mentioned this pull request Jul 7, 2025

-mlong-calls generates non-PIC code on ARM #39970

Open

alexrp mentioned this pull request Jul 7, 2025

Tracking issue for the LLVM 21 upgrade ziglang/zig#23176

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efriedma-quic reviewed Jul 7, 2025

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hstk30-hw requested review from davemgreen and hstk30-hw July 8, 2025 01:22

[ARM] support -mlong-calls -fPIC on arm32 llvm#39970 llvm#147313

f54d66d

jiangxuezhi force-pushed the mlong-call branch from 33f64ac to f54d66d Compare July 13, 2025 08:50

jiangxuezhi changed the title ~~[ARM] mlong-calls generate PIC code using GOT #39970~~ [ARM] support -mlong-calls -fPIC on arm32 #39970 Jul 13, 2025

efriedma-quic reviewed Jul 13, 2025

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alexrp mentioned this pull request Jul 22, 2025

Tracking issue for the LLVM 22 upgrade ziglang/zig#24542

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