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[PowerPC] Add DMR and WACC COPY support #149129

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[PowerPC] Add DMR and WACC COPY support #149129

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2 changes: 1 addition & 1 deletion llvm/lib/Target/PowerPC/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ add_llvm_target(PowerPCCodeGen
PPCTargetTransformInfo.cpp
PPCTOCRegDeps.cpp
PPCTLSDynamicCall.cpp
PPCVSXCopy.cpp
PPCVSXWACCCopy.cpp
PPCReduceCRLogicals.cpp
PPCVSXFMAMutate.cpp
PPCVSXSwapRemoval.cpp
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4 changes: 2 additions & 2 deletions llvm/lib/Target/PowerPC/PPC.h
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Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,7 @@ class ModulePass;
FunctionPass *createPPCLoopInstrFormPrepPass(PPCTargetMachine &TM);
FunctionPass *createPPCTOCRegDepsPass();
FunctionPass *createPPCEarlyReturnPass();
FunctionPass *createPPCVSXCopyPass();
FunctionPass *createPPCVSXWACCCopyPass();
FunctionPass *createPPCVSXFMAMutatePass();
FunctionPass *createPPCVSXSwapRemovalPass();
FunctionPass *createPPCReduceCRLogicalsPass();
Expand All @@ -64,7 +64,7 @@ class ModulePass;
void initializePPCLoopInstrFormPrepPass(PassRegistry&);
void initializePPCTOCRegDepsPass(PassRegistry&);
void initializePPCEarlyReturnPass(PassRegistry&);
void initializePPCVSXCopyPass(PassRegistry&);
void initializePPCVSXWACCCopyPass(PassRegistry&);
void initializePPCVSXFMAMutatePass(PassRegistry&);
void initializePPCVSXSwapRemovalPass(PassRegistry&);
void initializePPCReduceCRLogicalsPass(PassRegistry&);
Expand Down
43 changes: 43 additions & 0 deletions llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,7 @@
#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/RegisterPressure.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/CodeGen/StackMaps.h"
Expand Down Expand Up @@ -1863,6 +1864,48 @@ void PPCInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
.addReg(SrcRegSub1)
.addReg(SrcRegSub1, getKillRegState(KillSrc));
return;
} else if ((PPC::WACCRCRegClass.contains(DestReg) ||
PPC::WACC_HIRCRegClass.contains(DestReg)) &&
(PPC::WACCRCRegClass.contains(SrcReg) ||
PPC::WACC_HIRCRegClass.contains(SrcReg))) {

Opc = PPC::WACCRCRegClass.contains(SrcReg) ? PPC::DMXXEXTFDMR512
: PPC::DMXXEXTFDMR512_HI;

RegScavenger RS;
RS.enterBasicBlockEnd(MBB);
RS.backward(std::next(I));

Register TmpReg1 = RS.scavengeRegisterBackwards(PPC::VSRpRCRegClass, I,
/* RestoreAfter */ false, 0,
/* AllowSpill */ false);

RS.setRegUsed(TmpReg1);
Register TmpReg2 = RS.scavengeRegisterBackwards(PPC::VSRpRCRegClass, I,
/* RestoreAfter */ false, 0,
/* AllowSpill */ false);

BuildMI(MBB, I, DL, get(Opc))
.addReg(TmpReg1, RegState::Define)
.addReg(TmpReg2, RegState::Define)
.addReg(SrcReg, getKillRegState(KillSrc));

Opc = PPC::WACCRCRegClass.contains(DestReg) ? PPC::DMXXINSTDMR512
: PPC::DMXXINSTDMR512_HI;

BuildMI(MBB, I, DL, get(Opc), DestReg)
.addReg(TmpReg1, RegState::Kill)
.addReg(TmpReg2, RegState::Kill);

return;
} else if (PPC::DMRRCRegClass.contains(DestReg) &&
PPC::DMRRCRegClass.contains(SrcReg)) {

BuildMI(MBB, I, DL, get(PPC::DMMR), DestReg)
.addReg(SrcReg, getKillRegState(KillSrc));

return;

} else
llvm_unreachable("Impossible reg-to-reg copy");

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4 changes: 2 additions & 2 deletions llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -129,7 +129,7 @@ LLVMInitializePowerPCTarget() {
initializePPCLoopInstrFormPrepPass(PR);
initializePPCTOCRegDepsPass(PR);
initializePPCEarlyReturnPass(PR);
initializePPCVSXCopyPass(PR);
initializePPCVSXWACCCopyPass(PR);
initializePPCVSXFMAMutatePass(PR);
initializePPCVSXSwapRemovalPass(PR);
initializePPCReduceCRLogicalsPass(PR);
Expand Down Expand Up @@ -528,7 +528,7 @@ bool PPCPassConfig::addInstSelector() {
addPass(createPPCCTRLoopsVerify());
#endif

addPass(createPPCVSXCopyPass());
addPass(createPPCVSXWACCCopyPass());
return false;
}

Expand Down
43 changes: 35 additions & 8 deletions llvm/lib/Target/PowerPC/PPCVSXCopy.cpp → llvm/lib/Target/PowerPC/PPCVSXWACCCopy.cpp
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
//===-------------- PPCVSXCopy.cpp - VSX Copy Legalization ----------------===//
//===-------------- PPCVSXWACCCopy.cpp - VSX and WACC Copy Legalization ----------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
Expand All @@ -8,7 +8,7 @@
//
// A pass which deals with the complexity of generating legal VSX register
// copies to/from register classes which partially overlap with the VSX
// register file.
// register file and combines the wacc/wacc_hi copies when needed.
//
//===----------------------------------------------------------------------===//

Expand All @@ -29,12 +29,12 @@ using namespace llvm;
#define DEBUG_TYPE "ppc-vsx-copy"

namespace {
// PPCVSXCopy pass - For copies between VSX registers and non-VSX registers
// PPCVSXWACCCopy pass - For copies between VSX registers and non-VSX registers
// (Altivec and scalar floating-point registers), we need to transform the
// copies into subregister copies with other restrictions.
struct PPCVSXCopy : public MachineFunctionPass {
struct PPCVSXWACCCopy : public MachineFunctionPass {
static char ID;
PPCVSXCopy() : MachineFunctionPass(ID) {}
PPCVSXWACCCopy() : MachineFunctionPass(ID) {}

const TargetInstrInfo *TII;

Expand Down Expand Up @@ -122,6 +122,33 @@ namespace {
// Transform the original copy into a subregister extraction copy.
SrcMO.setReg(NewVReg);
SrcMO.setSubReg(PPC::sub_64);
} else if (IsRegInClass(DstMO.getReg(), &PPC::WACC_HIRCRegClass, MRI) &&
IsRegInClass(SrcMO.getReg(), &PPC::WACCRCRegClass, MRI)) {
// Matches the pattern:
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Good to add a comment about the type of copy this is meant to do similar to the blocks above.

// %a:waccrc = COPY %b.sub_wacc_hi:dmrrc
// %c:wacc_hirc = COPY %a:waccrc
// And replaces it with:
// %c:wacc_hirc = COPY %b.sub_wacc_hi:dmrrc
MachineInstr *DefMI = MRI.getUniqueVRegDef(SrcMO.getReg());
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nit: indent off

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I will run this through clang-format. Since it modifies this file significantly, I kept it for after the review is done.

if (!DefMI || !DefMI->isCopy())
continue;

MachineOperand &OrigSrc = DefMI->getOperand(1);

if (!IsRegInClass(OrigSrc.getReg(), &PPC::DMRRCRegClass, MRI))
continue;

if (OrigSrc.getSubReg() != PPC::sub_wacc_hi)
continue;

// Rewrite the second copy to use the original register's subreg
SrcMO.setReg(OrigSrc.getReg());
SrcMO.setSubReg(PPC::sub_wacc_hi);
Changed = true;

// Remove the intermediate copy if safe
if (MRI.use_nodbg_empty(DefMI->getOperand(0).getReg()))
DefMI->eraseFromParent();
}
}

Expand Down Expand Up @@ -151,9 +178,9 @@ namespace {
};
} // end anonymous namespace

INITIALIZE_PASS(PPCVSXCopy, DEBUG_TYPE,
INITIALIZE_PASS(PPCVSXWACCCopy, DEBUG_TYPE,
"PowerPC VSX Copy Legalization", false, false)

char PPCVSXCopy::ID = 0;
char PPCVSXWACCCopy::ID = 0;
FunctionPass*
llvm::createPPCVSXCopyPass() { return new PPCVSXCopy(); }
llvm::createPPCVSXWACCCopyPass() { return new PPCVSXWACCCopy(); }
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