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[WebAssembly] Constant fold wasm.dot #149619

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27 changes: 27 additions & 0 deletions llvm/lib/Analysis/ConstantFolding.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1657,6 +1657,7 @@ bool llvm::canConstantFoldCallTo(const CallBase *Call, const Function *F) {
case Intrinsic::aarch64_sve_convert_from_svbool:
case Intrinsic::wasm_alltrue:
case Intrinsic::wasm_anytrue:
case Intrinsic::wasm_dot:
// WebAssembly float semantics are always known
case Intrinsic::wasm_trunc_signed:
case Intrinsic::wasm_trunc_unsigned:
Expand Down Expand Up @@ -3826,6 +3827,32 @@ static Constant *ConstantFoldFixedVectorCall(
}
return ConstantVector::get(Result);
}
case Intrinsic::wasm_dot: {
unsigned NumElements =
cast<FixedVectorType>(Operands[0]->getType())->getNumElements();

assert(NumElements == 8 && Result.size() == 4 &&
"wasm dot takes i16x8 and produces i32x4");
assert(Ty->isIntegerTy());
int32_t MulVector[8];

for (unsigned I = 0; I < NumElements; ++I) {
ConstantInt *Elt0 =
cast<ConstantInt>(Operands[0]->getAggregateElement(I));
ConstantInt *Elt1 =
cast<ConstantInt>(Operands[1]->getAggregateElement(I));

APInt IMul = Elt0->getValue().sext(32) * Elt1->getValue().sext(32);

MulVector[I] = IMul.getSExtValue();
}
for (unsigned I = 0; I < Result.size(); I++) {
int32_t IAdd = MulVector[I * 2] + MulVector[I * 2 + 1];
Result[I] = ConstantInt::get(Ty, IAdd);
}

return ConstantVector::get(Result);
}
default:
break;
}
Expand Down
62 changes: 62 additions & 0 deletions llvm/test/Transforms/InstSimplify/ConstProp/WebAssembly/dot.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,62 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5

; RUN: opt -passes=instsimplify -S < %s | FileCheck %s

; Test that intrinsics wasm dot call are constant folded

target triple = "wasm32-unknown-unknown"


define <4 x i32> @dot_zero() {
; CHECK-LABEL: define <4 x i32> @dot_zero() {
; CHECK-NEXT: ret <4 x i32> zeroinitializer
;
%res = tail call <4 x i32> @llvm.wasm.dot(<8 x i16> zeroinitializer, <8 x i16> zeroinitializer)
ret <4 x i32> %res
}

; a = 1 2 3 4 5 6 7 8
; b = 1 2 3 4 5 6 7 8
; k1|k2 = a * b = 1 4 9 16 25 36 49 64
; k1 + k2 = (1+4) | (9 + 16) | (25 + 36) | (49 + 64)
; result = 5 | 25 | 61 | 113
define <4 x i32> @dot_nonzero() {
; CHECK-LABEL: define <4 x i32> @dot_nonzero() {
; CHECK-NEXT: ret <4 x i32> <i32 5, i32 25, i32 61, i32 113>
;
%res = tail call <4 x i32> @llvm.wasm.dot(<8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, <8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>)
ret <4 x i32> %res
}

define <4 x i32> @dot_doubly_negative() {
; CHECK-LABEL: define <4 x i32> @dot_doubly_negative() {
; CHECK-NEXT: ret <4 x i32> splat (i32 2)
;
%res = tail call <4 x i32> @llvm.wasm.dot(<8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>)
ret <4 x i32> %res
}

; This test checks for llvm's compliance on spec's wasm.dot's imul and iadd
; Since the original number can only be i16::max == 2^15 - 1,
; subsequent modulo of 2^32 of imul and iadd
; should return the same result
; 2*(2^15 - 1)^2 % 2^32 == 2*(2^15 - 1)^2
define <4 x i32> @dot_follow_modulo_spec_1() {
; CHECK-LABEL: define <4 x i32> @dot_follow_modulo_spec_1() {
; CHECK-NEXT: ret <4 x i32> <i32 2147352578, i32 0, i32 0, i32 0>
;
%res = tail call <4 x i32> @llvm.wasm.dot(<8 x i16> <i16 32767, i16 32767, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, <8 x i16> <i16 32767, i16 32767, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
ret <4 x i32> %res
}

; This test checks for llvm's compliance on spec's wasm.dot's imul and iadd
; 2*(- 2^15)^2 == 2^31, doesn't exceed 2^32 so we don't have to mod
; wrapping around is -(2^31), still doesn't exceed 2^32
define <4 x i32> @dot_follow_modulo_spec_2() {
; CHECK-LABEL: define <4 x i32> @dot_follow_modulo_spec_2() {
; CHECK-NEXT: ret <4 x i32> <i32 -2147483648, i32 0, i32 0, i32 0>
;
%res = tail call <4 x i32> @llvm.wasm.dot(<8 x i16> <i16 -32768, i16 -32768, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, <8 x i16> <i16 -32768, i16 -32768, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
ret <4 x i32> %res
}

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