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[llvm] Regenerate test checks including TBAA semantics (NFC) #154354

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07bc787
[UTC] Introduce test (NFC)
antoniofrighetto Jun 26, 2025
4cb9edd
[UTC] Record TBAA semantics when autogenerating check lines
antoniofrighetto Jul 2, 2025
cd95078
[llvm] Regenerate test checks including TBAA semantics (NFC)
antoniofrighetto Aug 10, 2025
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45 changes: 29 additions & 16 deletions llvm/test/Analysis/TypeBasedAliasAnalysis/dse.ll
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Original file line number Diff line number Diff line change
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -aa-pipeline=tbaa,basic-aa -passes=dse -S | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

; DSE should make use of TBAA.

define i8 @test0_yes(ptr %a, ptr %b) nounwind {
; CHECK-LABEL: define i8 @test0_yes
; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[TBAA0:![0-9]+]]
; CHECK-NEXT: store i8 1, ptr [[A]], align 1, !tbaa [[TBAA3:![0-9]+]]
; CHECK-LABEL: define i8 @test0_yes(
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[BAR_TBAA0:![0-9]+]]
; CHECK-NEXT: store i8 1, ptr [[A]], align 1, !tbaa [[FOO_TBAA3:![0-9]+]]
; CHECK-NEXT: ret i8 [[Y]]
;
store i8 0, ptr %a, !tbaa !1
Expand All @@ -18,11 +18,11 @@ define i8 @test0_yes(ptr %a, ptr %b) nounwind {
}

define i8 @test0_no(ptr %a, ptr %b) nounwind {
; CHECK-LABEL: define i8 @test0_no
; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: store i8 0, ptr [[A]], align 1, !tbaa [[TBAA3]]
; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[TBAA5:![0-9]+]]
; CHECK-NEXT: store i8 1, ptr [[A]], align 1, !tbaa [[TBAA3]]
; CHECK-LABEL: define i8 @test0_no(
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: store i8 0, ptr [[A]], align 1, !tbaa [[FOO_TBAA3]]
; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[BAR_TBAA5:![0-9]+]]
; CHECK-NEXT: store i8 1, ptr [[A]], align 1, !tbaa [[FOO_TBAA3]]
; CHECK-NEXT: ret i8 [[Y]]
;
store i8 0, ptr %a, !tbaa !3
Expand All @@ -32,9 +32,9 @@ define i8 @test0_no(ptr %a, ptr %b) nounwind {
}

define i8 @test1_yes(ptr %a, ptr %b) nounwind {
; CHECK-LABEL: define i8 @test1_yes
; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[TBAA8:![0-9]+]]
; CHECK-LABEL: define i8 @test1_yes(
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[QUX_TBAA8:![0-9]+]]
; CHECK-NEXT: store i8 1, ptr [[A]], align 1
; CHECK-NEXT: ret i8 [[Y]]
;
Expand All @@ -45,10 +45,10 @@ define i8 @test1_yes(ptr %a, ptr %b) nounwind {
}

define i8 @test1_no(ptr %a, ptr %b) nounwind {
; CHECK-LABEL: define i8 @test1_no
; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
; CHECK-LABEL: define i8 @test1_no(
; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: store i8 0, ptr [[A]], align 1
; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[TBAA10:![0-9]+]]
; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[B]], align 1, !tbaa [[QUX_TBAA10:![0-9]+]]
; CHECK-NEXT: store i8 1, ptr [[A]], align 1
; CHECK-NEXT: ret i8 [[Y]]
;
Expand Down Expand Up @@ -80,3 +80,16 @@ define i8 @test1_no(ptr %a, ptr %b) nounwind {
!10 = !{ !"bar", !12}
!11 = !{ !"qux", !0}
!12 = !{!"different"}
;.
; CHECK: [[BAR_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
; CHECK: [[META1]] = !{!"bar", [[META2:![0-9]+]]}
; CHECK: [[META2]] = !{}
; CHECK: [[FOO_TBAA3]] = !{[[META4:![0-9]+]], [[META4]], i64 0}
; CHECK: [[META4]] = !{!"foo", [[META2]]}
; CHECK: [[BAR_TBAA5]] = !{[[META6:![0-9]+]], [[META6]], i64 0}
; CHECK: [[META6]] = !{!"bar", [[META7:![0-9]+]]}
; CHECK: [[META7]] = !{!"different"}
; CHECK: [[QUX_TBAA8]] = !{[[META9:![0-9]+]], [[META9]], i64 0, i1 true}
; CHECK: [[META9]] = !{!"qux", [[META2]]}
; CHECK: [[QUX_TBAA10]] = !{[[META9]], [[META9]], i64 0, i1 false}
;.
50 changes: 25 additions & 25 deletions llvm/test/Analysis/TypeBasedAliasAnalysis/gvn-nonlocal-type-mismatch.ll
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -aa-pipeline=tbaa,basic-aa -passes=gvn -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MEMDEP
; RUN: opt -aa-pipeline=tbaa,basic-aa -passes='gvn<memoryssa>' -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MEMSSA

Expand All @@ -11,8 +11,8 @@ define void @yes(i1 %c, ptr %p, ptr %p1, ptr %q) nounwind {
; CHECK-MEMDEP-LABEL: define void @yes(
; CHECK-MEMDEP-SAME: i1 [[C:%.*]], ptr [[P:%.*]], ptr [[P1:%.*]], ptr [[Q:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-MEMDEP-NEXT: [[ENTRY:.*:]]
; CHECK-MEMDEP-NEXT: store i32 0, ptr [[P]], align 4, !tbaa [[TBAA0:![0-9]+]]
; CHECK-MEMDEP-NEXT: store i32 1, ptr [[P1]], align 4, !tbaa [[TBAA3:![0-9]+]]
; CHECK-MEMDEP-NEXT: store i32 0, ptr [[P]], align 4, !tbaa [[RED_TBAA0:![0-9]+]]
; CHECK-MEMDEP-NEXT: store i32 1, ptr [[P1]], align 4, !tbaa [[BLU_TBAA3:![0-9]+]]
; CHECK-MEMDEP-NEXT: br i1 [[C]], label %[[IF_ELSE:.*]], label %[[IF_THEN:.*]]
; CHECK-MEMDEP: [[IF_THEN]]:
; CHECK-MEMDEP-NEXT: store i32 0, ptr [[Q]], align 4
Expand All @@ -23,11 +23,11 @@ define void @yes(i1 %c, ptr %p, ptr %p1, ptr %q) nounwind {
; CHECK-MEMSSA-LABEL: define void @yes(
; CHECK-MEMSSA-SAME: i1 [[C:%.*]], ptr [[P:%.*]], ptr [[P1:%.*]], ptr [[Q:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-MEMSSA-NEXT: [[ENTRY:.*:]]
; CHECK-MEMSSA-NEXT: store i32 0, ptr [[P]], align 4, !tbaa [[TBAA0:![0-9]+]]
; CHECK-MEMSSA-NEXT: store i32 1, ptr [[P1]], align 4, !tbaa [[TBAA3:![0-9]+]]
; CHECK-MEMSSA-NEXT: store i32 0, ptr [[P]], align 4, !tbaa [[RED_TBAA0:![0-9]+]]
; CHECK-MEMSSA-NEXT: store i32 1, ptr [[P1]], align 4, !tbaa [[BLU_TBAA3:![0-9]+]]
; CHECK-MEMSSA-NEXT: br i1 [[C]], label %[[IF_ELSE:.*]], label %[[IF_THEN:.*]]
; CHECK-MEMSSA: [[IF_THEN]]:
; CHECK-MEMSSA-NEXT: [[T:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[TBAA0]]
; CHECK-MEMSSA-NEXT: [[T:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[RED_TBAA0]]
; CHECK-MEMSSA-NEXT: store i32 [[T]], ptr [[Q]], align 4
; CHECK-MEMSSA-NEXT: ret void
; CHECK-MEMSSA: [[IF_ELSE]]:
Expand Down Expand Up @@ -56,15 +56,15 @@ define void @watch_out_for_type_change(i1 %c, ptr %p, ptr %p1, ptr %q) nounwind
; CHECK-LABEL: define void @watch_out_for_type_change(
; CHECK-SAME: i1 [[C:%.*]], ptr [[P:%.*]], ptr [[P1:%.*]], ptr [[Q:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: store i32 0, ptr [[P]], align 4, !tbaa [[TBAA0:![0-9]+]]
; CHECK-NEXT: store i32 1, ptr [[P1]], align 4, !tbaa [[TBAA3:![0-9]+]]
; CHECK-NEXT: store i32 0, ptr [[P]], align 4, !tbaa [[RED_TBAA0:![0-9]+]]
; CHECK-NEXT: store i32 1, ptr [[P1]], align 4, !tbaa [[BLU_TBAA3:![0-9]+]]
; CHECK-NEXT: br i1 [[C]], label %[[IF_ELSE:.*]], label %[[IF_THEN:.*]]
; CHECK: [[IF_THEN]]:
; CHECK-NEXT: [[T:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[TBAA5:![0-9]+]]
; CHECK-NEXT: [[T:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[OUTER_SPACE_TBAA5:![0-9]+]]
; CHECK-NEXT: store i32 [[T]], ptr [[Q]], align 4
; CHECK-NEXT: ret void
; CHECK: [[IF_ELSE]]:
; CHECK-NEXT: [[U:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[TBAA8:![0-9]+]]
; CHECK-NEXT: [[U:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[BRICK_RED_TBAA8:![0-9]+]]
; CHECK-NEXT: store i32 [[U]], ptr [[Q]], align 4
; CHECK-NEXT: ret void
;
Expand All @@ -91,29 +91,29 @@ define void @watch_out_for_another_type_change(i1 %c, ptr %p, ptr %p1, ptr %q) n
; CHECK-MEMDEP-LABEL: define void @watch_out_for_another_type_change(
; CHECK-MEMDEP-SAME: i1 [[C:%.*]], ptr [[P:%.*]], ptr [[P1:%.*]], ptr [[Q:%.*]]) #[[ATTR0]] {
; CHECK-MEMDEP-NEXT: [[ENTRY:.*:]]
; CHECK-MEMDEP-NEXT: store i32 0, ptr [[P]], align 4, !tbaa [[TBAA0]]
; CHECK-MEMDEP-NEXT: store i32 1, ptr [[P1]], align 4, !tbaa [[TBAA3]]
; CHECK-MEMDEP-NEXT: store i32 0, ptr [[P]], align 4, !tbaa [[RED_TBAA0]]
; CHECK-MEMDEP-NEXT: store i32 1, ptr [[P1]], align 4, !tbaa [[BLU_TBAA3]]
; CHECK-MEMDEP-NEXT: br i1 [[C]], label %[[IF_ELSE:.*]], label %[[IF_THEN:.*]]
; CHECK-MEMDEP: [[IF_THEN]]:
; CHECK-MEMDEP-NEXT: store i32 0, ptr [[Q]], align 4
; CHECK-MEMDEP-NEXT: ret void
; CHECK-MEMDEP: [[IF_ELSE]]:
; CHECK-MEMDEP-NEXT: [[U:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[TBAA5]]
; CHECK-MEMDEP-NEXT: [[U:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[OUTER_SPACE_TBAA5]]
; CHECK-MEMDEP-NEXT: store i32 [[U]], ptr [[Q]], align 4
; CHECK-MEMDEP-NEXT: ret void
;
; CHECK-MEMSSA-LABEL: define void @watch_out_for_another_type_change(
; CHECK-MEMSSA-SAME: i1 [[C:%.*]], ptr [[P:%.*]], ptr [[P1:%.*]], ptr [[Q:%.*]]) #[[ATTR0]] {
; CHECK-MEMSSA-NEXT: [[ENTRY:.*:]]
; CHECK-MEMSSA-NEXT: store i32 0, ptr [[P]], align 4, !tbaa [[TBAA0]]
; CHECK-MEMSSA-NEXT: store i32 1, ptr [[P1]], align 4, !tbaa [[TBAA3]]
; CHECK-MEMSSA-NEXT: store i32 0, ptr [[P]], align 4, !tbaa [[RED_TBAA0]]
; CHECK-MEMSSA-NEXT: store i32 1, ptr [[P1]], align 4, !tbaa [[BLU_TBAA3]]
; CHECK-MEMSSA-NEXT: br i1 [[C]], label %[[IF_ELSE:.*]], label %[[IF_THEN:.*]]
; CHECK-MEMSSA: [[IF_THEN]]:
; CHECK-MEMSSA-NEXT: [[T:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[TBAA8]]
; CHECK-MEMSSA-NEXT: [[T:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[BRICK_RED_TBAA8]]
; CHECK-MEMSSA-NEXT: store i32 [[T]], ptr [[Q]], align 4
; CHECK-MEMSSA-NEXT: ret void
; CHECK-MEMSSA: [[IF_ELSE]]:
; CHECK-MEMSSA-NEXT: [[U:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[TBAA5]]
; CHECK-MEMSSA-NEXT: [[U:%.*]] = load i32, ptr [[P]], align 4, !tbaa [[OUTER_SPACE_TBAA5]]
; CHECK-MEMSSA-NEXT: store i32 [[U]], ptr [[Q]], align 4
; CHECK-MEMSSA-NEXT: ret void
;
Expand Down Expand Up @@ -144,25 +144,25 @@ if.else:
!8 = !{!"brick red", !5}
!9 = !{!"observable universe"}
;.
; CHECK-MEMDEP: [[TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
; CHECK-MEMDEP: [[RED_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
; CHECK-MEMDEP: [[META1]] = !{!"red", [[META2:![0-9]+]]}
; CHECK-MEMDEP: [[META2]] = !{}
; CHECK-MEMDEP: [[TBAA3]] = !{[[META4:![0-9]+]], [[META4]], i64 0}
; CHECK-MEMDEP: [[BLU_TBAA3]] = !{[[META4:![0-9]+]], [[META4]], i64 0}
; CHECK-MEMDEP: [[META4]] = !{!"blu", [[META2]]}
; CHECK-MEMDEP: [[TBAA5]] = !{[[META6:![0-9]+]], [[META6]], i64 0}
; CHECK-MEMDEP: [[OUTER_SPACE_TBAA5]] = !{[[META6:![0-9]+]], [[META6]], i64 0}
; CHECK-MEMDEP: [[META6]] = !{!"outer space", [[META7:![0-9]+]]}
; CHECK-MEMDEP: [[META7]] = !{!"observable universe"}
; CHECK-MEMDEP: [[TBAA8]] = !{[[META9:![0-9]+]], [[META9]], i64 0}
; CHECK-MEMDEP: [[BRICK_RED_TBAA8]] = !{[[META9:![0-9]+]], [[META9]], i64 0}
; CHECK-MEMDEP: [[META9]] = !{!"brick red", [[META1]]}
;.
; CHECK-MEMSSA: [[TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
; CHECK-MEMSSA: [[RED_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
; CHECK-MEMSSA: [[META1]] = !{!"red", [[META2:![0-9]+]]}
; CHECK-MEMSSA: [[META2]] = !{}
; CHECK-MEMSSA: [[TBAA3]] = !{[[META4:![0-9]+]], [[META4]], i64 0}
; CHECK-MEMSSA: [[BLU_TBAA3]] = !{[[META4:![0-9]+]], [[META4]], i64 0}
; CHECK-MEMSSA: [[META4]] = !{!"blu", [[META2]]}
; CHECK-MEMSSA: [[TBAA5]] = !{[[META6:![0-9]+]], [[META6]], i64 0}
; CHECK-MEMSSA: [[OUTER_SPACE_TBAA5]] = !{[[META6:![0-9]+]], [[META6]], i64 0}
; CHECK-MEMSSA: [[META6]] = !{!"outer space", [[META7:![0-9]+]]}
; CHECK-MEMSSA: [[META7]] = !{!"observable universe"}
; CHECK-MEMSSA: [[TBAA8]] = !{[[META9:![0-9]+]], [[META9]], i64 0}
; CHECK-MEMSSA: [[BRICK_RED_TBAA8]] = !{[[META9:![0-9]+]], [[META9]], i64 0}
; CHECK-MEMSSA: [[META9]] = !{!"brick red", [[META1]]}
;.
21 changes: 14 additions & 7 deletions llvm/test/Analysis/TypeBasedAliasAnalysis/memcpyopt.ll
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S -aa-pipeline=tbaa,basic-aa -passes=memcpyopt,instcombine < %s | FileCheck %s

target datalayout = "e-p:64:64:64"
Expand All @@ -7,10 +7,12 @@ target datalayout = "e-p:64:64:64"
; it has a TBAA tag which declares that it is unrelated.

define void @foo(ptr nocapture %p, ptr nocapture %q, ptr nocapture %s) nounwind {
; CHECK: @foo
; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) %p, ptr noundef nonnull align 1 dereferenceable(16) %q, i64 16, i1 false), !tbaa !0
; CHECK-NEXT: store i8 2, ptr %s, align 1, !tbaa [[TAGA:!.*]]
; CHECK-NEXT: ret void
; CHECK-LABEL: define void @foo(
; CHECK-SAME: ptr captures(none) [[P:%.*]], ptr captures(none) [[Q:%.*]], ptr captures(none) [[S:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[P]], ptr noundef nonnull align 1 dereferenceable(16) [[Q]], i64 16, i1 false), !tbaa [[B_TBAA0:![0-9]+]]
; CHECK-NEXT: store i8 2, ptr [[S]], align 1, !tbaa [[A_TBAA3:![0-9]+]]
; CHECK-NEXT: ret void
;
tail call void @llvm.memcpy.p0.p0.i64(ptr %p, ptr %q, i64 16, i1 false), !tbaa !2
store i8 2, ptr %s, align 1, !tbaa !1
tail call void @llvm.memcpy.p0.p0.i64(ptr %q, ptr %p, i64 16, i1 false), !tbaa !2
Expand All @@ -19,10 +21,15 @@ define void @foo(ptr nocapture %p, ptr nocapture %q, ptr nocapture %s) nounwind

declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind

; CHECK: [[TAGA]] = !{[[TYPEA:!.*]], [[TYPEA]], i64 0}
; CHECK: [[TYPEA]] = !{!"A", !{{.*}}}
!0 = !{!"tbaa root"}
!1 = !{!3, !3, i64 0}
!2 = !{!4, !4, i64 0}
!3 = !{!"A", !0}
!4 = !{!"B", !0}
;.
; CHECK: [[B_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
; CHECK: [[META1]] = !{!"B", [[META2:![0-9]+]]}
; CHECK: [[META2]] = !{!"tbaa root"}
; CHECK: [[A_TBAA3]] = !{[[META4:![0-9]+]], [[META4]], i64 0}
; CHECK: [[META4]] = !{!"A", [[META2]]}
;.
44 changes: 25 additions & 19 deletions llvm/test/Bitcode/upgrade-masked-keep-metadata.ll
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Original file line number Diff line number Diff line change
@@ -1,9 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S < %s | FileCheck %s
define <4 x i32> @load(ptr nocapture readonly %a0) !dbg !8 {
; CHECK-LABEL: @load(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A0:%.*]], i32 16, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> undef), !dbg [[DBG19:![0-9]+]], !tbaa [[TBAA20:![0-9]+]]
; CHECK-LABEL: define <4 x i32> @load(
; CHECK-SAME: ptr readonly captures(none) [[A0:%.*]]) !dbg [[DBG8:![0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A0]], i32 16, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> undef), !dbg [[DBG19:![0-9]+]], !tbaa [[CHAR_TBAA20:![0-9]+]]
; CHECK-NEXT: ret <4 x i32> [[V0]], !dbg [[DBG23:![0-9]+]]
;
entry:
Expand All @@ -12,9 +13,10 @@ entry:
}

define void @store(<4 x i32> %a0, ptr nocapture %a1) !dbg !24 {
; CHECK-LABEL: @store(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @llvm.masked.store.v4i32.p0(<4 x i32> [[A0:%.*]], ptr [[A1:%.*]], i32 16, <4 x i1> <i1 false, i1 true, i1 false, i1 true>), !dbg [[DBG30:![0-9]+]], !tbaa [[TBAA20]]
; CHECK-LABEL: define void @store(
; CHECK-SAME: <4 x i32> [[A0:%.*]], ptr captures(none) [[A1:%.*]]) !dbg [[DBG24:![0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: call void @llvm.masked.store.v4i32.p0(<4 x i32> [[A0]], ptr [[A1]], i32 16, <4 x i1> <i1 false, i1 true, i1 false, i1 true>), !dbg [[DBG30:![0-9]+]], !tbaa [[CHAR_TBAA20]]
; CHECK-NEXT: ret void, !dbg [[DBG31:![0-9]+]]
;
entry:
Expand All @@ -23,9 +25,10 @@ entry:
}

define <4 x i32> @gather(<4 x ptr> %a0) !dbg !32 {
; CHECK-LABEL: @gather(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> [[A0:%.*]], i32 16, <4 x i1> <i1 true, i1 true, i1 true, i1 false>, <4 x i32> undef), !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA20]]
; CHECK-LABEL: define <4 x i32> @gather(
; CHECK-SAME: <4 x ptr> [[A0:%.*]]) !dbg [[DBG32:![0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> [[A0]], i32 16, <4 x i1> <i1 true, i1 true, i1 true, i1 false>, <4 x i32> undef), !dbg [[DBG35:![0-9]+]], !tbaa [[CHAR_TBAA20]]
; CHECK-NEXT: ret <4 x i32> [[V0]], !dbg [[DBG36:![0-9]+]]
;
entry:
Expand All @@ -34,9 +37,10 @@ entry:
}

define void @scatter(<4 x i32> %a0, <4 x ptr> %a1) !dbg !37 {
; CHECK-LABEL: @scatter(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @llvm.masked.scatter.v4i32.v4p0(<4 x i32> [[A0:%.*]], <4 x ptr> [[A1:%.*]], i32 16, <4 x i1> <i1 false, i1 true, i1 true, i1 true>), !dbg [[DBG41:![0-9]+]], !tbaa [[TBAA20]]
; CHECK-LABEL: define void @scatter(
; CHECK-SAME: <4 x i32> [[A0:%.*]], <4 x ptr> [[A1:%.*]]) !dbg [[DBG37:![0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: call void @llvm.masked.scatter.v4i32.v4p0(<4 x i32> [[A0]], <4 x ptr> [[A1]], i32 16, <4 x i1> <i1 false, i1 true, i1 true, i1 true>), !dbg [[DBG41:![0-9]+]], !tbaa [[CHAR_TBAA20]]
; CHECK-NEXT: ret void, !dbg [[DBG42:![0-9]+]]
;
entry:
Expand All @@ -45,9 +49,10 @@ entry:
}

define <4 x i32> @expandload(ptr nocapture readonly %a0) !dbg !43 {
; CHECK-LABEL: @expandload(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.expandload.v4i32(ptr [[A0:%.*]], <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x i32> undef), !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA50:![0-9]+]]
; CHECK-LABEL: define <4 x i32> @expandload(
; CHECK-SAME: ptr readonly captures(none) [[A0:%.*]]) !dbg [[DBG43:![0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.expandload.v4i32(ptr [[A0]], <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x i32> undef), !dbg [[DBG49:![0-9]+]], !tbaa [[INT_TBAA50:![0-9]+]]
; CHECK-NEXT: ret <4 x i32> [[V0]], !dbg [[DBG52:![0-9]+]]
;
entry:
Expand All @@ -56,9 +61,10 @@ entry:
}

define void @compressstore(<4 x i32> %a0, ptr nocapture %a1) !dbg !53 {
; CHECK-LABEL: @compressstore(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @llvm.masked.compressstore.v4i32(<4 x i32> [[A0:%.*]], ptr [[A1:%.*]], <4 x i1> <i1 false, i1 false, i1 true, i1 true>), !dbg [[DBG59:![0-9]+]], !tbaa [[TBAA50]]
; CHECK-LABEL: define void @compressstore(
; CHECK-SAME: <4 x i32> [[A0:%.*]], ptr captures(none) [[A1:%.*]]) !dbg [[DBG53:![0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: call void @llvm.masked.compressstore.v4i32(<4 x i32> [[A0]], ptr [[A1]], <4 x i1> <i1 false, i1 false, i1 true, i1 true>), !dbg [[DBG59:![0-9]+]], !tbaa [[INT_TBAA50]]
; CHECK-NEXT: ret void, !dbg [[DBG60:![0-9]+]]
;
entry:
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