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184 Open 932 Closed
184 Open 932 Closed
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Issues list

[TASK] Build ReadTheDocs documentation from cv32a60x branch Component:Doc For issues in the Documentation (e.g. for README.md files) CV32A65X Part: Embedded configuration
#2861 opened Mar 22, 2025 by MikeOpenHWGroup
2 tasks
@MikeOpenHWGroup
1
[BUG] No reference for Synthesis notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2860 opened Mar 21, 2025 by deepeshsahoo
1 task done
1
[BUG] spike : Incorrect result values in instructions CV32A65X Part: Embedded configuration Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2852 opened Mar 21, 2025 by AyoubJalali
1 task done
@zchamski
1
[BUG] Tandem verification with generated tests triggers occasional differences on SLT/SLTI result values CV32A65X Part: Embedded configuration Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2849 opened Mar 20, 2025 by zchamski
1 task done
@zchamski
1
[BUG] Regression Tests Failures: Incorrect PC jumps & Missing zbkb Extension Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2839 opened Mar 18, 2025 by lx3211
1 task done
1
Unable to run any simulations, SPIKE install fails notCV32A65X It is not an CV32A65X issue
#2836 opened Mar 18, 2025 by hardiselg
2
[BUG] mtinst corrupted notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2831 opened Mar 17, 2025 by KatCe
1 task done
Issue while running riscv_config_gen.py for configuration cv64a60ax Component:Tool-and-build For issues in the tool and build flow (e.g. Makefile, FuseSoc, etc.) notCV32A65X It is not an CV32A65X issue
#2827 opened Mar 13, 2025 by khandelwaltanuj
1 task done
1
[BUG] csr_regfile is not compilant with SystemVerilog Standard Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2824 opened Mar 12, 2025 by cathales
1 task done
[BUG] Error when upgrading Verilator notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2817 opened Mar 9, 2025 by jason23g
1 task done
3
[BUG] Compiler errors when running the cvxif_verif_regression Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2794 opened Feb 26, 2025 by nachoge98
1 task done
2
Error-[ILWOR] Incorrect Logical Worklib or Reflib notCV32A65X It is not an CV32A65X issue
#2788 opened Feb 24, 2025 by JackySu
[BUG] Too many ways of configuring Spike Tandem wrt. CV-X-IF verification Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2768 opened Feb 12, 2025 by zchamski
1 task done
1
[BUG] <title> FPU error behavior notCV32A65X It is not an CV32A65X issue PARAM:FPU Issue depends on the FPU parameter Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2766 opened Feb 11, 2025 by yutong0505
1 task done
1
toolchain build error notCV32A65X It is not an CV32A65X issue
#2757 opened Feb 3, 2025 by RakeshpatilLB
8
Steps to run custom assembly programs notCV32A65X It is not an CV32A65X issue
#2746 opened Jan 28, 2025 by RakeshpatilLB
2
[BUG] Can't find export or definition for 'read_section_sv' and other used functions causing Fatal Errors when not found in any .so included with Questasim notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2744 opened Jan 27, 2025 by ahmedelalfy94
1 task done
[TASK] Implement and deploy full doc+config generation flow based on riscv-config specs Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system Type:Task Project related task
#2738 opened Jan 24, 2025 by zchamski
1 task done
@zchamski
1
Add readthedocs action to GitHub Component:Doc For issues in the Documentation (e.g. for README.md files) Type:Enhancement For feature requests and enhancements
#2737 opened Jan 23, 2025 by cathales
2
[BUG] Cross-privilege TLB leakage through SLS notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2732 opened Jan 23, 2025 by TobiasKovats
1 task done
WFI resumes execution unconditionally on supervisor external interrupt notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2730 opened Jan 22, 2025 by ezelioli
Keep several versions of spike notCV32A65X It is not an CV32A65X issue Type:Enhancement For feature requests and enhancements
#2709 opened Jan 16, 2025 by cathales
@zchamski
OpenPiton configuration of CVA6 cannot boot Linux on UltraScale+ FPGA CV64A6 Part: 64bits configuration Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2700 opened Jan 10, 2025 by MikeOpenHWGroup
@Jbalkind @cfuguet
@ASintzoff @fatimasaleem
2
[BUG] SBE/UBE/MBE Bit in mstatus Register Does Not Affect Endianness of Explicit Memory Accesses notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2695 opened Jan 8, 2025 by riscv914
1 task done
3
[BUG] interrupts delegattion Not Masked in M-Mode as Expected notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2693 opened Jan 8, 2025 by riscv914
1 task done
2
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