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@oscc-ip OSCC IP Project

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    5 repositories

    • artifact

      Public archive
      A repository provides build artifacts for various open-source EDA tools.
      openstaieda
      openstaieda
      0•2•0•0•Updated Apr 14, 2026Apr 14, 2026

    • .github

      Public
      The README of organization.
      GNU General Public License v3.0
      •0•1•0•0•Updated Jul 9, 2025Jul 9, 2025

    • sdram

      Public
      An open source SDR SDRAM controller based on the AXI4 bus and verified by FPGA and tapeout. It can support memory particles of different manufacturers and model…
      fpgaverilogsdram
      fpgaverilogsdramaxi4tapeout
      Scala
      •3•22•0•1•Updated May 12, 2025May 12, 2025

    • cl2-chisel

      Public
      The chisel version of CL2 (low power mcu) core.
      Scala
      •
      Other
      •0•1•0•0•Updated Jan 8, 2025Jan 8, 2025

    • cl2

      Public
      The systemverilog version of CL2 (low power mcu) core.
      SystemVerilog
      •
      Mulan Permissive Software License, Version 2
      •0•1•0•0•Updated Jan 8, 2025Jan 8, 2025
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