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Issues list

Support for write addressing with latch inference enhancement New feature or request
#102 opened Mar 22, 2025 by povik
Crash/internal assertion on usage of unknown define bug Something isn't working
#101 opened Mar 21, 2025 by povik
Avoid usage of NEW_ID for naming enhancement New feature or request
#100 opened Mar 21, 2025 by povik
Add command for finding out yosys-slang/slang revisions enhancement New feature or request
#99 opened Mar 18, 2025 by povik
Unpacked unions trigger an internal assertion bug Something isn't working
#95 opened Mar 5, 2025 by david-sawatzke
1
References to constants from packages not resolved bug Something isn't working
#93 opened Feb 25, 2025 by povik
1
Mismatched $fatal arguments invalidate containing procedural block bug Something isn't working
#92 opened Feb 25, 2025 by povik
CI should use debug builds of slang enhancement New feature or request
#91 opened Feb 25, 2025 by povik
Assertion failure inside unknown_cells.ys test bug Something isn't working
#90 opened Feb 25, 2025 by povik
Using undeclared interface with --ignore-unknown-modules results in failed assertion bug Something isn't working
#89 opened Feb 24, 2025 by david-sawatzke
1
[Feature request] Break SystemVerilog structs into individual elements enhancement New feature or request
#88 opened Feb 21, 2025 by KatCe
Optimize out self-assignment from DFF reset patterns enhancement New feature or request
#87 opened Feb 11, 2025 by georgerennie
5
Add tests for expected errors enhancement New feature or request
#86 opened Feb 2, 2025 by povik
support $past and related system functions enhancement New feature or request
#84 opened Jan 23, 2025 by rroohhh
2
Support always_ff on memory with initialization enhancement New feature or request
#83 opened Jan 23, 2025 by povik
2
Re-enable interface array test bug Something isn't working
#82 opened Jan 21, 2025 by povik
Unhelpful error message on hierarchical references bug Something isn't working
#79 opened Jan 19, 2025 by povik
SVA (SystemVerilog assertions) support enhancement New feature or request
#77 opened Jan 10, 2025 by povik
1
yosys-slang ignoring verilog_defaults enhancement New feature or request
#74 opened Jan 6, 2025 by dpetrisko
5
Simpler sourcing of technology libraries in FPGA flows enhancement New feature or request
#72 opened Dec 19, 2024 by gmsanchez
8
Feature unimplemented (xor X[N-1:0] (a, b, c)) enhancement New feature or request
#70 opened Dec 7, 2024 by miquelt9
1
Efficient handling of sparse memory initialization enhancement New feature or request
#69 opened Nov 21, 2024 by povik
Support ports w/o direct correspondence to a net/variable enhancement New feature or request
#67 opened Nov 2, 2024 by povik
1
lack of warnings/errors for unwanted latches enhancement New feature or request
#56 opened Oct 2, 2024 by astrollo
3
Remove warning from the embedded cmake step enhancement New feature or request help wanted Extra attention is needed
#44 opened Sep 4, 2024 by povik
2
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