repro(svg): real board ignores active component display modes

[KrishnaX12]

Problem

The schematic SVG renderer ignores a component's active DISPLAYMODE when selecting component-owned primitives.

In the power schematic used here, ten polarized capacitors have DISPLAYMODE = 1. Altium 365 renders their lower plates as curves, but altiumts renders the inactive mode-0 flat plates.

Real-board reproduction

This PR adds the unmodified, MIT-licensed AmirhosseinR/Altium_DSP_FPGA power schematic as a pinned reference:

• commit: 61e66e61a6b7fbcfbc370a0b756b2958f38ad493
• SHA-256: a0e51aeb708bcb7d8f444073a16e5edf9e8aee63ce28329122942ca27150373f

The original schematic naturally contains ten Cap Pol3 components using display mode 1. Each contains mode-1 arc records for the curved polarized-capacitor plate.

The test does not modify or crop the source schematic. It verifies those real binary records and records the current broken full-sheet SVG snapshot.

Visual Comparison

altiumviewer.tscircuit.com	Reference (Altium 365)

Expected behavior

The renderer should select each component's active display-mode primitives, producing curved lower plates for all ten polarized capacitors, matching Altium 365.

Follow-up fix: #130

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