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fix(agc): run wave32 compute programs on 32-wide subgroups - #316
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oneandonlydean merged 2 commits intoOct 4, 2026
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MixPrecision and SdwaDestination dispatch hand-assembled RDNA through the recompiler and compare every lane with a CPU model, but were never in ctest. Move them to tests/execution/, which is globbed into one test per file with the same target names, so new execution tests add a file and no CMake lines. They exit 77 (skipped) when the host has no Vulkan device; the Linux runner installs lavapipe and sets ANYPS5_REQUIRE_VULKAN=1 so they cannot skip there. Co-Authored-By: Claude <noreply@anthropic.com>
On devices whose default subgroup is 64 lanes (RADV, AMD on Windows) a wave32 compute program was compiled for a 64-wide host subgroup, so the two guest waves of a 64-thread workgroup shared one subgroup: ballots, EXEC, v_mbcnt and lane reads of the second wave saw the first one's lanes. With VK_EXT_subgroup_size_control, when compute can require 32 lanes, the dispatch recompiles wave32 programs for a 32-wide host subgroup (VulkanDevice::ComputeTarget) and the pipeline requires that size. The result records the width it was compiled for (hostSubgroupSize, also in the disk cache). Co-Authored-By: Claude <noreply@anthropic.com>
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This was referenced Oct 2, 2026
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Since boykopovar#316 a wave32 dispatch recompiles for a 32-wide subgroup target, so preparing for the device target built a source the dispatch never looked up. PrepareSource is added to the shader cache's reviewed names. Co-Authored-By: Claude <noreply@anthropic.com>
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Since boykopovar#316 a wave32 dispatch recompiles for a 32-wide subgroup target, so preparing for the device target built a source the dispatch never looked up. PrepareSource is added to the shader cache's reviewed names. Co-Authored-By: Claude <noreply@anthropic.com>
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Takes the 13 gate-batch PRs that merged upstream (boykopovar#319 boykopovar#329 boykopovar#330 boykopovar#331 boykopovar#325 boykopovar#435 boykopovar#471 boykopovar#294 boykopovar#376 boykopovar#404 boykopovar#394 boykopovar#401 boykopovar#446) in place of astrobot's local versions, as integ/gate-batch cab0eab had them: boykopovar#294 and boykopovar#376 in astrobot's depth model (DepthTarget, state.depth), boykopovar#394 with the thick mip tails, boykopovar#401 over astrobot's slab pool, boykopovar#471 keeping the settled single-lane path. Also takes the rest of main since a818bee (boykopovar#532 boykopovar#340 boykopovar#486 boykopovar#484 boykopovar#316 boykopovar#243 boykopovar#334 boykopovar#434 boykopovar#437 boykopovar#470 boykopovar#373 boykopovar#452 boykopovar#455 and our upstreamed PRs, where astrobot keeps its later revisions and env switches). Resolution notes: relinker converter/matcher/tests are upstream's (boykopovar#432 decoder covers VEX RIP-relative followers); RecompileResult gains boykopovar#316's hostSubgroupSize (set from request.target.subgroupSize); shader disk cache format 9; boykopovar#452's scissor message; upstream's later live-stack and memory-copy decode tests. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01Mgp3oZvembQziVNE2xARQK
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What
On devices whose default subgroup is 64 lanes (RADV; AMD on Windows reports 64 too), a wave32 compute program was compiled for a 64-wide host subgroup. With more than 32 threads per workgroup, two guest waves then share one host subgroup, so everything wave-wide in the second wave sees the first one:
v_mbcntlane ids, ballots/VCC, EXEC saved or changed byv_cmpx,v_readlane. On RADV, a 64-thread wave32 dispatch givesv_mbcnt_lo= 32..63 in the second wave instead of 0..31.Fix, with
VK_EXT_subgroup_size_control:VulkanDeviceenablessubgroupSizeControlwhen the default subgroup is wider than 32, 32 lies in[minSubgroupSize, maxSubgroupSize]and compute is inrequiredSubgroupSizeStages.VulkanDevice::ComputeTarget(waveSize)returnsTarget()withsubgroupSize = 32for wave32 programs on such devices.Dispatch.cppuses it, so the program is recompiled for a 32-wide host subgroup, the path NVIDIA already takes.RecompileResult::hostSubgroupSizerecords the width the program was laid out for. It is stored in the disk cache and fills existing padding, so the struct size is unchanged. The compute pipeline addsVkPipelineShaderStageRequiredSubgroupSizeCreateInfoEXT{32}when it is 32 and the device's default is not.Wave64 programs and devices whose default is already 32 (NVIDIA) are unchanged. The cache key already includes
target.subgroupSize.Not in this PR: graphics stages. RADV can require 32 for fragment/mesh/task, but not vertex. That needs per-stage widths in
Pipeline.cppand its own tests, so it is a follow-up.Test
agc_driver_wave32_subgroup: one 64-thread wave32 dispatch, hand-assembled (words fromllvm-mc -mcpu=gfx1013). Each lane checksv_mbcnt_lo(lane in its wave),s_bcnt1of a VCC compare (8 per wave),v_readlane_b32 lane 3(its own wave's lane 3), and the EXEC save →v_cmpx→ restore pattern. It is skipped when the device cannot run wave32 on 32-wide subgroups (lavapipe: 8).Tested
Linux, full ctest (99) passes.
device->Target()(the old path):thread 32 v_mbcnt_lo_u32_b32 is 32, expected 0.VulkanDevice/Recompiler/ShaderDiskCache(perf(shader): cut hot-path overhead in recompile cache lookups #218 fix(shader): rect lists take explicitly interpolated fragment parameters and refuse only custom ones #261 perf(agc): keep the 10-bit scanout resident and present it with the guest path's pixels #278 fix(libSceAgcDriver): prefer a discrete GPU over the first suitable device #282 feat(agc): host import windows, least-recent eviction under the budget #290 perf(agc): draw cache keys on the user words a program reads, memoizes failures, serves data-only hits #291).Checklist
main; no other open PR implements the same functionsNotImplemented_nid_no_patch); silent stubs are listed in TechnicalDebt.mdfiles or images added to the repository (attach them to this PR)